Method for manufacturing high-strength structural stacked capacitor

1. A method for manufacturing high-strength structural stacked capacitor, comprising the following steps:

forming a laminate structure on a substrate, wherein the laminate structure includes a sacrificial layer disposed above the substrate;

forming a plurality of capacitor trenches in the laminate structure;

forming a lower electrode layer to cover a sidewall of each of the capacitor trenches;

continually forming a first dielectric layer and a first upper electrode on the laminate structure, wherein the first dielectric layer is deposited over the capacitor trenches to cover a first surface of each of the lower electrode layers, and wherein the first upper electrode layer is deposited over the capacitor trenches to cover the surface of the first dielectric layers;

forming a first etch stop layer on the first upper electrode layer;

selectively removing the first upper electrode layer, the first dielectric layer, the lower electrode layers, and the first etch stop layer to form a plurality of openings that expose the sacrificial layer;

removing the sacrificial layer to form a plurality of etching spaces between the capacitor trenches via the openings to expose a second surface of each of the lower electrode layers; and

continually forming a second dielectric layer and a second upper electrode layer on the first etch stop layer after the sacrificial layer is removed, wherein the second dielectric layer is deposited over the etching spaces to cover each second surface of the lower electrode layers, and wherein the second upper electrode layer is deposited over the etching spaces to cover the surface of the second dielectric layer.

2. The method according to claim 1 , further comprising a step of forming a patterned second etch stop layer on the second upper electrode layer after the step of continually forming a second dielectric layer and a second upper electrode on the first etch stop layer, wherein the patterned second etch stop layer exposes the openings.

3. The method according to claim 2 , further comprising a step of forming a protective layer on the patterned second etch stop layer after the step of forming a patterned second etch stop layer on the second upper electrode layer, wherein the protective layer is deposited to fill the etching spaces to cover the surface of the second upper electrode layer.

4. The method according to claim 3 , further comprising the steps of forming an oxide layer on the protective layer, then forming a plurality of contact windows that pass through the oxide layer, the protective layer, the patterned second etch stop layer, the second upper electrode layer, the second dielectric layer, and a part of first etch stop layer after the step of forming a protective layer on the patterned second etch stop layer.

5. The method according to claim 1 , wherein the substrate includes a plurality of contact plugs, and the contact plugs are exposed to the bottom ends of the capacitor trenches respectively in the step of forming a plurality of capacitor trenches in the laminate structure.

6. The method according to claim 1 , wherein the laminate structure includes a liner layer disposed between the substrate and the sacrificial layer, and the liner layer is formed to provide support or the lower electrode layers after the step of removing the sacrificial layer of the laminate structure.

7. The method according to claim 1 , wherein each lower electrode layer is made of copper, titanium, or titanium nitride, the first upper electrode layer is made of copper, titanium, or titanium nitride, the second upper electrode layer is made of copper, titanium, or titanium nitride, the lower electrode layer, the first and second upper electrode layers are formed in chemical vapor deposition.

8. The method according to claim 1 , wherein the first etch stop layer is made of tungsten, tungsten nitride, or silicon nitride, the second etch stop layer is made of tungsten, tungsten nitride, or silicon nitride, the first and second etch stop layers are formed in chemical vapor deposition.