IP Library Granted Patent US 9,601,369
Granted Patent B2
US 9,601,369 · App. 14/249,307 · Granted Mar 21, 2017

Semiconductor device and method of forming conductive vias with trench in saw street

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Quick Facts
Patent No.
US 9,601,369
App. No.
14/249,307
Granted
Mar 21, 2017
Kind
B2
Abstract

A semiconductor wafer has a plurality of semiconductor die separated by a peripheral region. A trench is formed in the peripheral region of the wafer. A via is formed on the die. The trench extends to and is continuous with the via. A first conductive layer is deposited in the trench and via to form conductive TSV. The first conductive layer is conformally applied or completely fills the trench and via. The trench has a larger area than the vias which accelerates formation of the first conductive layer. A second conductive layer is deposited over a front surface of the die. The second conductive layer is electrically connected to the first conductive layer. The first and second conductive layers can be formed simultaneously. A portion of a back surface of the wafer is removed to expose the first conductive layer. The die can be electrically interconnected through the TSVs.

Claims (52)

1. A method of making a semiconductor device, comprising:

providing a first semiconductor die;

providing a second semiconductor die;

forming a first via through a first surface of the first semiconductor die;

forming a second via through the first surface of the first semiconductor die;

forming a trench in a peripheral region between the first semiconductor die and second semiconductor die and extending parallel with adjacent edges of the first semiconductor die from the first via to the second via;

depositing a first conductive layer conformally in the trench and extending continuously from the first via to the second via;

back-grinding a second surface of the semiconductor die opposite the first surface to remove a portion of the first conductive layer in the trench; and

removing the peripheral region between the first semiconductor die and second semiconductor die to electrically isolate the first via from the second via.

2. The method of claim 1 , further including forming an insulating layer in the trench, first via, and second via.

3. The method of claim 1 , further including stacking a plurality of semiconductor die coupled through the via.

4. The method of claim 1 , further including:

forming a third via through a first surface of the second semiconductor die; and

depositing the first conductive layer in the third via and extending continuously from the third via to the first via and second via.

5. A method of making a semiconductor device, comprising:

providing a semiconductor die;

forming a first via in the semiconductor die;

forming a second via in the semiconductor die;

forming a trench in a peripheral region of the semiconductor die connecting the first via and second via;

depositing a first conductive layer in the trench, first via, and second via; and

singulating the semiconductor die through the trench to fully remove the first conductive layer in the trench and partially remove the first conductive layer in the first via and second via.

6. The method of claim 5 , further including depositing the first conductive layer conformally into the trench, first via, and second via.

7. The method of claim 5 , further including forming the trench to be continuous along a length of the peripheral region and surround the semiconductor die.

8. The method of claim 5 , further including stacking a plurality of semiconductor die coupled through the first via and second via.

9. The method of claim 5 , further including forming the first conductive layer to extend continuously into the first via and second via.

10. The method of claim 5 , further including forming an insulating layer in the trench, first via, and second via.

11. A method of making a semiconductor device, comprising:

providing a semiconductor die;

forming a via in the semiconductor die and extending into a peripheral region of the semiconductor die;

forming a trench in the peripheral region of the semiconductor die with the trench extending to and continuous with the via;

forming a first conductive layer in the trench and via; and

removing the peripheral region of the semiconductor die including fully removing the first conductive layer in the trench.

12. The method of claim 11 , further including forming an insulating layer in the trench and via.

13. The method of claim 11 , further including forming a second conductive layer over a surface of the semiconductor die electrically connected to the first conductive layer.

14. The method of claim 11 , further including forming the first conductive layer conformally within the trench and via.

15. The method of claim 11 , further including stacking a plurality of semiconductor die electrically connected through the via.

16. The method of claim 11 , wherein a depth of the trench is approximately equal to a depth of the via.

17. The method of claim 11 , further including forming the first conductive layer extending to a contact pad of the semiconductor die.

18. A method of making a semiconductor device, comprising:

providing a semiconductor die;

forming a via in the semiconductor die and extending into a saw street adjacent to the semiconductor die;

forming a trench along an edge of the semiconductor die in the saw street with a length of the trench greater than a length of the edge of the semiconductor die, wherein a portion of the trench extends to the via; and

singulating the semiconductor die through the saw street to remove an entirety of the trench.

19. The method of claim 18 , further including forming an insulating layer in the trench.

20. The method of claim 18 , further including conformally applying a first conductive layer to fill the trench only partially.

21. The method of claim 18 , further including forming the trench to surround the semiconductor die.

22. The method of claim 18 , wherein a depth of the trench is approximately equal to a depth of the via.

23. The method of claim 18 , wherein singulating the semiconductor die through the saw street removes a portion of the via.

24. The method of claim 18 , further including:

forming the via to a first depth into the semiconductor die; and

forming the trench to a second depth into the semiconductor die, wherein the second depth is approximately equal to the first depth.

25. The method of claim 18 , further including forming a conductive layer in the via and trench that extends to a contact pad of the semiconductor die.

Assignments (4)
THIS SUBMISSION IS TO CORRECT A TYPOGRAPHICAL ERROR IN THE COVER SHEET PREVIOUSLY RECORDED ON REEL: 038378 FRAME: 0382 TO CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE." TO "STATS CHIPPAC PTE. LTD." Recorded Sep 6, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064869/0363 →
RELEASE OF SECURITY INTEREST Recorded Jun 16, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052963/0546 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0382 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →