Method for forming self-aligned isolation trenches in semiconductor substrate and semiconductor device
View Patent ↗The instant disclosure relates to a method for forming self-aligned isolation trenches in semiconductor substrate, comprising the following steps. The first step is providing a semiconductor substrate defined a plurality of active areas thereon. The next step is forming at least two buried bit lines in each of the active areas and an insulating structure disposed above and opposite to the at least two buried bit lines. The next step is forming a self-aligned spacer on the sidewalls of each of the insulating structures. The last step is selectively removing the semiconductor substrate with the self-aligned spacers as masks to form a plurality of isolation trenches.
1. A method for forming self-aligned isolation trenches in semiconductor substrate, comprising the following steps:
providing a semiconductor substrate defined a plurality of active areas thereon, wherein the step of providing a semiconductor substrate comprises:
forming a pad layer on a substrate;
forming a first mask layer on the pad layer; and
forming a second mask layer on the first hard mask layer;
forming at least two buried bit lines in each of the active areas and an insulating structure disposed above and opposite to the at least two buried bit lines, wherein the step of forming at least two buried bit lines in each of the active areas and an insulating structure disposed above and opposite to the at least two buried bit lines further comprises:
forming a patterned blocking layer on the second mask layer to define a plurality of bit line areas, each of which is among and vertically overlapped with each of the active areas;
conformally forming a sacrificial layer over the patterned blocking layer, wherein the sacrificial layer has a plurality of first openings defined therein, and the first openings are among the bit line areas respectively;
forming a plurality of masking structures in the first openings respectively;
selectively removing the sacrificial layer, the second mask layer, the first mask layer, the pad layer, and the substrate with the patterned blocking layer and the masking structures as masks to form two bit line trenches in each of the bit line areas;
completely removing the masking structures and the remained sacrificial layer, and selectively removing the second mask layer with the patterned blocking layer as mask to form a plurality of second openings, each of which is opposite to the two bit line trenches; and
filling a dielectric body into each of the second openings and the corresponding two bit line trenches;
forming a self-aligned spacer on the sidewalls of each of the insulating structures; and
selectively removing the semiconductor substrate with the self-aligned spacers as masks to form a plurality of isolation trenches.
2. The method for forming self-aligned isolation trenches in semiconductor substrate according to claim 1 , wherein the step of forming a plurality of masking structures in the first openings respectively further comprises etching back each of the masking structures to a desired thickness.
3. The method for forming self-aligned isolation trenches in semiconductor substrate according to claim 1 , wherein the step of forming a self-aligned spacer on the sidewalls of each of the insulating structures further comprises:
conformally depositing a spacer material on the semiconductor substrate; and
selectively removing the spacer material to form the self-aligned spacer on the sidewalls of each of the insulating structures via a dry etch-back process.