IP Library Granted Patent US 10,146,463
Granted Patent B2
US 10,146,463 · App. 14/452,878 · Granted Dec 4, 2018

Method and apparatus for a virtual system on chip

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Quick Facts
Patent No.
US 10,146,463
App. No.
14/452,878
Granted
Dec 4, 2018
Kind
B2
Abstract

A virtual system on chip (VSoC) is an implementation of a machine that allows for sharing of underlying physical machine resources between different virtual systems. A method or corresponding apparatus of the present invention relates to a method that includes a plurality of virtual systems on chip and a configuring unit. The configuring unit is arranged to configure resources on the method for the plurality of virtual systems on chip as a function of an identification tag assigned to each virtual system on chip.

Claims (40)

1. A device comprising:

a plurality of ingress hardware interfaces;

a plurality of processing cores on a single physical chip;

a plurality of virtual systems on chip, each virtual system on chip (VSoC) relating to a subset of the plurality of processing cores on the single physical chip; and

an input packet processing unit configured to:

receive a work request via a given ingress hardware interface of the plurality of ingress hardware interfaces of the device;

extract metadata from the work request received;

assign a given identification tag of a plurality of identification tags to the work request received, the given identification tag assigned to the work request received based on the metadata extracted, the metadata extracted representing a Media Access Control (MAC) address; and

assign the work request received to a given VSoC of the plurality of virtual systems on chip for processing at the given VSoC, wherein the work request received is assigned to the given VSoC based on the given identification tag assigned based on the MAC address by the input packet processing unit to the work request received.

2. The device of claim 1 , wherein to assign the work request the input packet processing unit is further configured to:

employ a lookup table, the lookup table configured to associate the metadata extracted with the given identification tag; and

the given identification tag is a unique identification tag of the plurality of identification tags assigned to the given VSoC.

3. The device of claim 1 , wherein the metadata extracted includes at least one field of a plurality of fields of a packet.

4. The device of claim 1 , wherein the input packet processing unit is further configured to:

store data included in the work request by employing a first pool of pointers corresponding to first free resources of a plurality of resources configured to support the plurality of virtual systems on chip; and

allocate work queue entries for the subset of the plurality of processing cores corresponding to the given VSoC by employing a second pool of pointers corresponding to second free resources of the plurality of resources.

5. The device of claim 1 , further comprising a Free Pool Allocator (FPA) configured to:

maintain pools of pointers to free resources in at least one resource configured to support the plurality of virtual systems on chip; and

allocate additional pools of pointers to free resources of the at least one resource to support the given VSoC.

6. The device of claim 5 , wherein the FPA is further configured to employ the given identification tag to determine whether free resources of the at least one resource are available for allocation.

7. The device of claim 5 , wherein the at least one resource is shared by the plurality of processing cores and is a level two cache or a Dynamic Random Access Memory (DRAM) coupled to the level two cache.

8. The device of claim 1 , further comprising a configuring unit and the given identification tag is a unique identification tag of the plurality of identification tags that is assigned to the given VSoC by the configuring unit.

9. The device of claim 1 , wherein the work request is a packet.

10. A method comprising:

receiving a work request via a given ingress hardware interface of a plurality of ingress hardware interfaces of a device;

extracting metadata, by an input packet processing unit of the device, from the work request received;

assigning a given identification tag of a plurality of identification tags to the work request received, the given identification tag assigned to the work request received based on the metadata extracted, the metadata extracted representing a Media Access Control (MAC) address; and

assigning the work request received to a given virtual system on chip (VSoC) of a plurality of virtual systems on chip for processing at the given VSoC, wherein the work request received is assigned to the given VSoC based on the given identification tag assigned based on the MAC address by the input packet processing unit to the work request received, the given VSoC relating to a subset of a plurality of processing cores on a single physical chip of the device.

11. The method of claim 10 , wherein assigning the work request includes employing a lookup table, the lookup table configured to associate the metadata extracted with the given identification tag and the given identification tag is a unique identification tag of the plurality of identification tags assigned to the given VSoC.

12. The method of claim 10 , wherein the metadata extracted includes at least one field of a plurality of fields of a packet.

13. The method of claim 10 , further comprising:

storing data included in the work request by employing a first pool of pointers corresponding to first free resources of a plurality of resources configured to support the plurality of virtual systems on chip; and

allocating work queue entries for the subset of the plurality of processing cores corresponding to the given VSoC by employing a second pool of pointers corresponding to second free resources of the plurality of resources.

14. The method of claim 10 , further comprising:

maintaining pools of pointers to free resources in at least one resource configured to support the plurality of virtual systems on chip; and

allocating additional pools of pointers to free resources of the at least one resource to support the given VSoC.

15. The method of claim 14 , further comprising employing the given identification tag to determine whether free resources of the at least one resource are available for allocation.

16. The method of claim 14 , wherein the at least one resource is shared by the plurality of processing cores and is a level two cache or a Dynamic Random Access Memory (DRAM) coupled to the level two cache.

17. The method of claim 10 , further comprising arranging a configuration unit in the device, wherein the given identification tag is a unique identification tag of the plurality of identification tags assigned to the given VSoC by the configuring unit.

18. The method of claim 10 , wherein the work request is a packet.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2020
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE, LTD.
Reel/Frame 053179/0320 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2020
From: CAVIUM, LLC
To: CAVIUM INTERNATIONAL
Reel/Frame 051948/0807 →
CERTIFICATE OF CONVERSION AND CERTIFICATE OF FORMATION Recorded Oct 2, 2018
From: CAVIUM, INC.
To: CAVIUM, LLC
Reel/Frame 047185/0422 →
RELEASE OF SECURITY INTEREST Recorded Jul 6, 2018
From: JP MORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: CAVIUM, INC; CAVIUM NETWORKS LLC; QLOGIC CORPORATION
Reel/Frame 046496/0001 →
SECURITY AGREEMENT Recorded Aug 17, 2016
From: CAVIUM, INC.; CAVIUM NETWORKS LLC
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 039715/0449 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 24, 2014
From: KESSLER, RICHARD; HUSSAIN, MUHAMMAD RAGHIB; GOYAL, RAJAN
To: CAVIUM NETWORKS, INC.
Reel/Frame 034026/0737 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 24, 2014
From: CAVIUM NETWORKS, INC.
To: CAVIUM, INC.
Reel/Frame 034026/0770 →
Cited By (1)
US 12,591,725