IP Library Granted Patent US 9,559,029
Granted Patent B2
US 9,559,029 · App. 14/523,556 · Granted Jan 31, 2017

Semiconductor device and method of forming interconnect structure for encapsulated die having pre-applied protective layer

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Quick Facts
Patent No.
US 9,559,029
App. No.
14/523,556
Granted
Jan 31, 2017
Kind
B2
Abstract

A semiconductor device has a protective layer formed over an active surface of a semiconductor wafer. The semiconductor die with pre-applied protective layer are moved from the semiconductor wafer and mounted on a carrier. The semiconductor die and contact pads on the carrier are encapsulated. The carrier is removed. A first insulating layer is formed over the pre-applied protective layer and contact pads. Vias are formed in the first insulating layer and pre-applied protective layer to expose interconnect sites on the semiconductor die. An interconnect structure is formed over the first insulating layer in electrical contact with the interconnect sites on the semiconductor die and contact pads. The interconnect structure has a redistribution layer formed on the first insulating layer, a second insulating layer formed on the redistribution layer, and an under bump metallization layer formed over the second dielectric in electrical contact with the redistribution layer.

Claims (51)

1. A method of making a semiconductor device, comprising:

providing a semiconductor die;

providing a first insulating layer contacting the semiconductor die;

depositing an encapsulant around the semiconductor die, a surface of the encapsulant being coplanar with a surface of the first insulating layer;

forming a second insulating layer over the first insulating layer; and

forming an interconnect structure over the semiconductor die by using a laser to form an opening through the first insulating layer and second insulating layer to electrically connect the interconnect structure to the semiconductor die.

2. The method of claim 1 , wherein forming the interconnect structure further includes forming a first conductive layer within the laser-formed opening.

3. The method of claim 2 , wherein forming the interconnect structure further includes forming a second conductive layer over the second insulating layer.

4. The method of claim 1 , further including forming a via through the encapsulant using the laser.

5. The method of claim 4 , further including disposing a conductive material within the laser-formed via.

6. A method of making a semiconductor device, comprising:

providing a semiconductor die;

depositing an encapsulant in contact with a back surface of the semiconductor die and a side surface adjacent to the back surface of the semiconductor die;

providing a first insulating layer over the semiconductor die and the encapsulant, the first insulating layer extending beyond a footprint of the semiconductor die;

forming an interconnect structure over the semiconductor die by using a laser to form a first opening through the first insulating layer extending to the semiconductor die to electrically connect the interconnect structure to the semiconductor die;

forming a first conductive layer coplanar with a surface of the encapsulant;

forming a second opening through the encapsulant using the laser, wherein the second opening terminates at the first conductive layer;

forming a conductive material in the second opening to contact the first conductive layer; and

forming a second insulating layer extending into the second opening over the conductive material.

7. The method of claim 6 , further including:

forming a third insulating layer over the first insulating layer; and

forming a third opening through the third insulating layer using the laser.

8. The method of claim 7 , wherein forming the interconnect structure further includes forming a second conductive layer within the first laser-formed opening and over the first insulating layer.

9. The method of claim 8 , wherein forming the interconnect structure further includes forming a third conductive layer over the third insulating layer.

10. A method of making a semiconductor device, comprising:

providing a semiconductor die;

depositing an encapsulant over a back surface of the semiconductor die and around the semiconductor die;

providing a first insulating layer over the semiconductor die, wherein the first insulating layer includes a first opening;

forming a second insulating layer over the first insulating layer;

forming a second opening through the second insulating layer and aligned with the first opening in the first insulating layer;

forming an interconnect structure over the semiconductor die and within the first opening and second opening;

forming a third opening through the encapsulant;

forming a conductive material in the third opening; and

forming a third insulating layer extending into the third opening over the conductive material.

11. The method of claim 10 , wherein forming the interconnect structure further includes forming a first conductive layer within the first opening and second opening.

12. The method of claim 11 , further including:

forming a third insulating layer extending into the first opening and second opening over the first conductive layer; and

forming a second conductive layer over the third insulating layer.

13. A method of making a semiconductor device, comprising:

providing a semiconductor die;

depositing an encapsulant over a back surface of the semiconductor die and around the semiconductor die;

providing a first insulating layer over the semiconductor die and encapsulant;

forming a second insulating layer over the first insulating layer;

forming a first opening through the first insulating layer and second insulating layer using a laser;

forming an interconnect structure over the semiconductor die and within the first opening; and

forming a third insulating layer extending into the first opening over the interconnect structure;

forming a second opening through the encapsulant;

forming a conductive material in the second opening; and

forming a fourth insulating layer extending into the second opening over the conductive material.

14. The method of claim 13 , wherein forming the interconnect structure further includes forming a first conductive layer within the first opening.

15. The method of claim 14 , wherein forming the interconnect structure further includes forming a second conductive layer over the third insulating layer.

Assignments (4)
THIS SUBMISSION IS TO CORRECT A TYPOGRAPHICAL ERROR IN THE COVER SHEET PREVIOUSLY RECORDED ON REEL: 038378 FRAME: 0382 TO CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE." TO "STATS CHIPPAC PTE. LTD." Recorded Sep 6, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064869/0363 →
RELEASE OF SECURITY INTEREST Recorded Jun 16, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052963/0546 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0382 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →