IP Library Granted Patent US 10,082,538
Granted Patent B2
US 10,082,538 · App. 14/617,546 · Granted Sep 25, 2018

Testbench builder, system, device and method

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Quick Facts
Patent No.
US 10,082,538
App. No.
14/617,546
Granted
Sep 25, 2018
Kind
B2
Abstract

A testbench for testing a device under test (DUT), wherein the testbench has a verification environment including a reference model, a scoreboard and a customized agent for each interface that the DUT needs to receive input from and/or transmit output on. The testbench system is able to be generated by a testbench builder that automatically creates a scoreboard, a reference model, a dispatcher and generic agents including generic drivers, loopback ports, sequencers and/or generic monitors for each interface and then automatically customize the generic agents based on their corresponding interface such that the agents meet the requirements of the interface for the DUT.

Claims (39)

1. A non-transitory computer readable medium storing a testbench builder for generating a testbench for verification of a component of a data processing circuit and configured to perform a method comprising:

reading an interface configuration file associated with the component and identifying one or more interfaces associated with the component defined in the interface configuration file;

generating a verification environment including a base agent for each of the interfaces in the interface configuration file, wherein the characteristics of the base agents are predefined independent of the interface configuration file; and

customizing one or more of the base agents based on interface parameters of the interface configuration file that are associated with the one or more of the base agents and instantiating the customized base agents in the verification environment.

2. The non-transitory computer readable medium of claim 1 , wherein the base agents are able to operate within the verification environment without customization.

3. The non-transitory computer readable medium of claim 1 , wherein the base agents each comprise a driver, a monitor and a sequencer.

4. The non-transitory computer readable medium of claim 1 , wherein the interface parameters comprise a handshaking protocol for each of the interfaces.

5. The non-transitory computer readable medium of claim 4 , wherein the customizing of the one or more of the base agents comprises configuring a transporter of each of the customized base agents to control the driver and the monitor of the each of the customized base agents according to the handshaking protocol for the associated interface.

6. The non-transitory computer readable medium of claim 1 , wherein generating the verification environment further comprises generating a reference model wrapper and a scoreboard wrapper.

7. The non-transitory computer readable medium of claim 1 , wherein each of the interfaces comprise a plurality of ports required to implement the interface and the interface parameters for each of the interfaces comprise names of the ports associated with the interface, width of the ports associated with the interface, direction of the ports associated with the interface, and whether each of the ports associated with the interface is for communicating control data or non-control data.

8. The non-transitory computer readable medium of claim 1 , wherein the interfaces are each associated with a communication pathway between the component and the data processing circuit.

9. The non-transitory computer readable medium of claim 1 , wherein the method further comprises coupling one or more of the ports of each of the base agents and the customized base agents to component ports of a device under test associated with the component.

10. A method of generating a testbench for verification of a component of a data processing circuit, the method comprising:

reading an interface configuration file associated with the component and stored on a memory, and identifying one or more interfaces associated with the component defined in the interface configuration file;

generating a verification environment on a non-transitory computer-readable medium, wherein the verification environment includes a base agent for each of the interfaces in the interface configuration file, wherein the characteristics of the base agents are predefined independent of the interface configuration file; and

customizing one or more of the base agents based on interface parameters of the interface configuration file that are associated with the one or more of the base agents and instantiating the customized base agents in the verification environment.

11. The method of claim 10 , wherein the base agents are able to operate within the verification environment without customization.

12. The method of claim 10 , wherein the base agents each comprise a driver, a monitor and a sequencer.

13. The method of claim 10 , wherein the interface parameters comprise a handshaking protocol for each of the interfaces.

14. The method of claim 13 , wherein the customizing of the one or more of the base agents comprises configuring a transporter of each of the customized base agents to control the driver and the monitor of the each of the customized base agents according to the handshaking protocol for the associated interface.

15. The method of claim 10 , wherein generating the verification environment further comprises generating a reference model wrapper and a scoreboard wrapper.

16. The method of claim 10 , wherein each of the interfaces comprise a plurality of ports required to implement the interface and the interface parameters for each of the interfaces comprise names of the ports associated with the interface, width of the ports associated with the interface, direction of the ports associated with the interface, and whether each of the ports associated with the interface is for communicating control data or non-control data.

17. The method of claim 10 , wherein the interfaces are each associated with a communication pathway between the component and the data processing circuit.

18. The method of claim 10 , further comprising coupling one or more of the ports of each of the base agents and the customized base agents to component ports of a device under test associated with the component.

19. A testbench system for verification of a component of a data processing circuit, the system comprising:

a non-transitory computer readable medium storing a testbench builder configured to perform a method comprising:

reading an interface configuration file associated with the component and identifying one or more interfaces associated with the component defined in the interface configuration file;

generating a verification environment including a base agent for each of the interfaces in the interface configuration file, wherein the characteristics of the base agents are predefined independent of the interface configuration file; and

customizing one or more of the base agents based on interface parameters of the interface configuration file that are associated with the one or more of the base agents and instantiating the customized base agents in the verification environment; and

at least one device under test associated with the component and communicatively coupled with the testbench via the base agents and customized agents of the verification environment, wherein the device under test is implemented in register transfer language and stored on a non-transitory computer readable memory.

20. The testbench system of claim 19 , wherein the base agents are able to operate within the verification environment without customization.

21. The testbench system of claim 19 , wherein the base agents each comprise a driver, a monitor and a sequencer.

22. The testbench system of claim 19 , wherein the interface parameters comprise a handshaking protocol for each of the interfaces.

23. The testbench system of claim 22 , wherein the customizing of the one or more of the base agents comprises configuring a transporter of each of the customized base agents to control the driver and the monitor of the each of the customized base agents according to the handshaking protocol for the associated interface.

24. The testbench system of claim 19 , wherein generating the verification environment further comprises generating a reference model wrapper and a scoreboard wrapper.

25. The testbench system of claim 19 , wherein each of the interfaces comprise a plurality of ports required to implement the interface and the interface parameters for each of the interfaces comprise names of the ports associated with the interface, width of the ports associated with the interface, direction of the ports associated with the interface, and whether each of the ports associated with the interface is for communicating control data or non-control data.

26. The testbench system of claim 19 , wherein the interfaces are each associated with a communication pathway between the component and the data processing circuit.

27. The testbench system of claim 19 , wherein the method further comprises coupling one or more of the ports of each of the base agents and the customized base agents to component ports of the device under test associated with the component.

28. The non-transitory computer readable medium of claim 1 , wherein each one of the base agents as generated is independent of a handshake protocol of the interface for which the one of the base agents was generated.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2020
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE, LTD.
Reel/Frame 053179/0320 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2020
From: CAVIUM, LLC
To: CAVIUM INTERNATIONAL
Reel/Frame 051948/0807 →
CHANGE OF NAME Recorded Sep 27, 2018
From: CAVIUM, INC.
To: CAVIUM, LLC
Reel/Frame 047577/0653 →
RELEASE OF SECURITY INTEREST Recorded Jul 6, 2018
From: JP MORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: CAVIUM, INC; CAVIUM NETWORKS LLC; QLOGIC CORPORATION
Reel/Frame 046496/0001 →
SECURITY AGREEMENT Recorded Aug 17, 2016
From: CAVIUM, INC.; CAVIUM NETWORKS LLC
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 039715/0449 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 15, 2016
From: SIVA, NIMALAN; HAN, KEQIN KENNETH; POLASANAPALLI, SRI DEVI; PATEL, SAURIN
To: CAVIUM, INC.
Reel/Frame 038298/0809 →