Low defect III-V semiconductor template on porous silicon

1. A method of forming a semiconductor on a porous semiconductor comprising:

forming a stack of layers including a first semiconductor layer on a substrate, a second semiconductor layer on the first semiconductor layer, and a third semiconductor layer on the second semiconductor layer, wherein a concentration of dopants within the second semiconductor layer is greater than a concentration of dopants in the first and third semiconductor layers;

converting the second semiconductor layer into a porous semiconductor layer using a porousification process;

annealing the third semiconductor layer; and

forming a fourth semiconductor layer on the third semiconductor layer,

wherein the fourth semiconductor layer is relaxed, the third semiconductor layer is strained, and the porous semiconductor layer is partially strained,

wherein the third semiconductor layer is thinner than the second semiconductor layer, and

wherein the fourth semiconductor layer is directly on the third semiconductor layer and the third semiconductor layer is directly on the second semiconductor layer.

2. The method of claim 1 , wherein the second semiconductor layer is silicon with a boron concentration of 2E20 atoms per centimeter cubed.

3. The method of claim 1 , wherein the third semiconductor layer is thinner than the fourth semiconductor layer.

4. The method of claim 1 , wherein the fourth semiconductor layer is a III-V semiconductor.

5. The method of claim 1 , wherein the porousification process includes:

exposing the second semiconductor layer to a hydrofluoric fluoride (HF) bath and

applying an electrical bias to each layer of the stack of layers, the HF bath reacting with the dopants in each semiconductor layer such that the concentration of dopants in the second semiconductor layer relative to the first and third semiconductor layers causes the second semiconductor layer to be converted into the porous semiconductor layer,

wherein the annealing of the third semiconductor layer reduces dopants and pores therefrom, the porous semiconductor layer remaining porous during the annealing.

6. The method of claim 1 , wherein the concentration of dopants within the second semiconductor layer is substantially uniform, the concentration of dopants within the first semiconductor layer is substantially uniform, and the concentration of dopants within the third semiconductor layer is substantially uniform.

7. A method of forming a semiconductor on a porous semiconductor comprising:

forming a stack of layers, the stack of layers including a base silicon layer on a substrate, a thick silicon layer on the base silicon layer, and a thin silicon layer on the thick silicon layer, wherein the thin silicon layer is thinner than the thick silicon layer, the thick silicon layer is relaxed, and the thin silicon layer is relaxed, and wherein a concentration of dopants within the thick silicon layer is greater than a concentration of dopants in the base and thin silicon layers;

converting the thick silicon layer into a porous silicon layer using a porousification process;

annealing the thin silicon layer; and

forming a III-V layer on the thin silicon layer, wherein the III-V layer is relaxed, the thin silicon layer is strained, and the porous silicon layer is partially strained;

wherein the III-V layer is directly on the thin silicon layer and the thin silicon layer is directly on the thick silicon layer.

8. The method of claim 7 , wherein the thin silicon layer has a thickness between 10 nm and 50 nm.

9. The method of claim 7 , wherein the thick silicon layer has a thickness between 100 nm and 200 nm.

10. The method of claim 7 , wherein the thick silicon layer has a boron concentration of 2E20 atoms per centimeter cubed, the thin silicon layer has a boron concentration of 2E18 atoms per centimeter cubed.

11. The method of claim 7 , wherein the porousification process includes:

immersing the stack of layers in a hydrofluoric fluoride (HF) bath; and

applying an electrical bias to each layer of the stack of layers, the HF bath reacting with the dopants in each silicon layer such that the concentration of dopants in the thick silicon layer relative to the base and thin silicon layer causes the thick silicon layer to be converted into the porous silicon layer,

wherein the annealing of the thin silicon layer reduces dopants and pores therefrom, the porous silicon layer remaining porous during the annealing.

12. The method of claim 7 , wherein the concentration of dopants within the thick silicon layer is substantially uniform, the concentration of dopants within the base silicon layer is substantially uniform, and the concentration of dopants within the thin silicon layer is substantially uniform.