Semiconductor devices including dummy chips
View Patent ↗A semiconductor device includes an interposer having a first side and a second side opposite to the first side, at least one active chip mounted on the first side within a chip mounting area through a plurality of first bumps, at least one dummy chip mounted on the first side within a peripheral area being adjacent to the chip mounting area, a molding compound disposed on the first side. The molding compound covers the at least one active chip and the at least one dummy chip. A plurality of solder bumps is mounted on the second side.
1. A semiconductor device, comprising: an interposer having a first side and a second side, opposite the first side; at least one active chip mounted on the first side of the interposer within a chip mounting area through first bumps; at least one dummy chip mounted on the first side of the interposer within a peripheral area, wherein the peripheral area is adjacent to and at least partially surrounding the chip mounting area; at least one electrically isolated, inactive dummy pad located outside the chip mounting area and within the peripheral area, wherein the at least one dummy chip is mounted only on the at least one electrically isolated, inactive dummy pad through second bumps; a molding compound located on the first side of the interposer, the molding compound covering the at least one active chip and the at least one dummy chip; and solder bumps mounted on the second side of the interposer.
2. The semiconductor device according to claim 1 , wherein the interposer comprises a redistribution layer (RDL).
3. The semiconductor device according to claim 2 , wherein the RDL comprises at least one dielectric layer and at least one metal layer.
4. The semiconductor device according to claim 1 , wherein the interposer does not comprise a through substrate via (TSV) substrate.
5. The semiconductor device according to claim 1 , wherein the at least one active chip comprises at least one active integrated circuit chip with certain functions.
6. The semiconductor device according to claim 5 , wherein the at least one active chip comprises a graphics processing unit, a central processing unit, or a memory chip.
7. The semiconductor device according to claim 1 , wherein the at least one dummy chip comprises at least one dummy silicon chip.
8. A semiconductor device, comprising:
an interposer having a first side and a second side, opposite the first side;
at least one active chip mounted on the first side of the interposer within a chip mounting area through first bumps;
at least one dummy chip mounted on the first side of the interposer outside the chip mounting area and within a peripheral area, wherein the peripheral area is adjacent to and at least partially surrounding the chip mounting area, and wherein the at least one dummy chip is mounted directly on the first side of the interposer with an adhesive such that the at least one dummy chip is electrically isolated from the interposer;
a molding compound located on the first side of the interposer, the molding compound covering the at least one active chip and the at least one dummy chip; and
solder bumps mounted on the second side of the interposer.
9. The semiconductor device according to claim 8 , further comprising a passivation layer on the second side of the interposer.
10. A semiconductor device, comprising: an interposer having a first side and a second side, opposite the first side; at least one active bump pad located on the first side of the interposer within a chip mounting area; at least one electrically isolated, inactive dummy pad located on the first side of the interposer within a peripheral area, the peripheral area being adjacent to and surrounding the chip mounting area on at least two sides; at least one active chip mounted on the at least one active bump pad; at least one dummy chip mounted only on the at least one electrically isolated, inactive dummy pad; a molding compound located on the first side of the interposer; and solder bumps mounted on the second side of the interposer.
11. The semiconductor device of claim 10 , further comprising redistribution layers located between the first side of the interposer and the second side of the interposer, each of the redistribution layers comprising at least one dielectric layer and at least one metal layer.
12. The semiconductor device of claim 11 , wherein the solder bumps mounted on the second side of the interposer are in direct physical contact with an outermost metal layer of the redistribution layers.
13. The semiconductor device of claim 11 , wherein the at least one dummy pad is not electrically connected to circuitry in the redistribution layers.
14. The semiconductor device of claim 11 , wherein an active side of the at least one active chip is positioned to face toward the redistribution layers.
15. The semiconductor device of claim 11 , wherein the at least one active bump pad is electrically connected to the solder bumps mounted on the second side of the interposer through the redistribution layers without using through substrate vias.
16. The semiconductor device of claim 10 , further comprising a passivation layer located on the second side of the interposer, wherein the solder bumps mounted on the second side of the interposer are located within openings of the passivation layer.
17. The semiconductor device of claim 10 , wherein the at least one active chip is mounted on the at least one active bump pad using first bumps, and the at least one electrically isolated, inactive dummy pad is mounted on the at least one electrically isolated, inactive dummy pad using second bumps.
18. The semiconductor device of claim 10 , wherein the at least one active chip is mounted only on a respective active bump pad, and the at least one dummy chip is mounted only on a respective electrically isolated, inactive dummy pad.
19. The semiconductor device of claim 10 , wherein the at least one active bump pad is located only within the chip mounting area, and the at least one electrically isolated, inactive dummy pad is located outside the chip mounting area and only within the peripheral area.
20. The semiconductor device of claim 10 , wherein the molding compound covers at least a portion of the first side of the interposer and lateral side surfaces of the at least one active chip and the at least one dummy chip, without covering upper surfaces of the at least one active chip and the at least one dummy chip.