Multi-die package having different types of semiconductor dies attached to the same thermally conductive flange
View Patent ↗A multi-die package is manufactured by attaching a first semiconductor die made of a first semiconductor material to a thermally conductive flange via a first die attach material, and attaching a second semiconductor die to the same thermally conductive flange as the first semiconductor die via a second die attach material. The second semiconductor die is made of a second semiconductor material different than the first semiconductor material. The first semiconductor die is held in place by the first die attach material during attachment of the second semiconductor die to the flange. Leads are attached to the thermally conductive flange or to an insulating member secured to the flange. The leads provide external electrical access to the first and second semiconductor dies.
1. A method of manufacturing a multi-die package, comprising:
attaching a first semiconductor die made of a first semiconductor material to a thermally conductive flange via a first die attach material;
attaching a second semiconductor die to the same thermally conductive flange as the first semiconductor die via a second die attach material, the second semiconductor die being made of a second semiconductor material different than the first semiconductor material, and wherein the first semiconductor die is held in place by the first die attach material during attachment of the second semiconductor die to the flange; and
attaching leads to the thermally conductive flange or to an insulating member secured to the flange, the leads providing external electrical access to the first and second semiconductor dies,
wherein the first semiconductor die is a main amplifier of a Doherty amplifier circuit and the second semiconductor die is a peaking amplifier of the Doherty amplifier circuit,
wherein the first semiconductor die is made of gallium nitride (GaN) and the second semiconductor die is made of silicon (Si).
2. The method of claim 1 , wherein a plurality of semiconductor dies made of the first semiconductor material are attached to the thermally conductive flange via the first die attach material, and wherein a plurality of semiconductor dies made of the second semiconductor material are attached to the thermally conductive flange via the second die attach material.
3. The method of claim 2 , wherein some of the semiconductor dies made of the first semiconductor material are power transistor dies, and wherein other ones of the semiconductor dies made of the first semiconductor material are passive capacitor dies.
4. The method of claim 1 , wherein the first die attach material has a first die attach temperature range, and wherein the second die attach material has a second die attach temperature range which is different than the first die attach temperature range.
5. The method of claim 4 , wherein the first die attach temperature range is greater than the second die attach temperature range, wherein the first semiconductor die is attached to the thermally conductive flange before the second semiconductor die, and wherein the first die attach material remains in a solid state during attachment of the second semiconductor die to the thermally conductive flange.
6. The method of claim 5 , further comprising:
placing the thermally conductive flange in a first die attach chamber for attaching the first semiconductor die to the thermally conductive flange; and
moving the thermally conductive flange from the first die attach chamber to a second die attach chamber for attaching the second semiconductor die to the thermally conductive flange.
7. The method of claim 5 , further comprising:
aligning the first semiconductor die with respect to a plurality of fiducials on the thermally conductive flange prior to attachment of the first semiconductor die to the thermally conductive flange; and
aligning the second semiconductor die with respect to the same fiducials as the first semiconductor die prior to attachment of the second semiconductor die to the thermally conductive flange.
8. The method of claim 5 , further comprising:
aligning the first semiconductor die with respect to a plurality of fiducials on the thermally conductive flange prior to attachment of the first semiconductor die to the thermally conductive flange; and
aligning the second semiconductor die with respect to a plurality of fiducials on the first semiconductor die prior to attachment of the second semiconductor die to the thermally conductive flange.
9. The method of claim 1 , wherein the first semiconductor die and the second semiconductor die are attached to the thermally conductive flange as part of a common die attach process performed in a single die attach chamber.
10. The method of claim 9 , further comprising:
aligning the first semiconductor die and the second semiconductor die with respect to a plurality of fiducials on the thermally conductive flange prior to attachment of the first semiconductor die and the second semiconductor die to the thermally conductive flange.
11. The method of claim 1 , wherein the first die attach material partly or fully solidifies during attachment of the first semiconductor die to the thermally conductive flange and remains partly or fully solidified during attachment of the second semiconductor die to the flange.
12. The method of claim 1 , wherein the first die attach material has a surface tension which prevents the first semiconductor die from moving during attachment of the second semiconductor die to the thermally conductive flange.