Granted Patent B2

US 10,838,719 · App. 14/940,538 · Granted Nov 17, 2020

Abstract

Claims (52)

1. A method for performing an operation on operands, each operand including elements of a selectable size, the method comprising:

determining a mask based on a selected size of an element, wherein said determining the mask includes setting a sequence of a plurality of bits of the mask based on the selected size of the element, and wherein bits of the mask correspond to an operation performed on portions of the operands;

selecting, at a subject multiplexer of a plurality of multiplexers, based on a bit, of the plurality of bits of the mask, associated with the subject multiplexer, between carrying a partial result of the operation performed on corresponding first portions of a first operand and a second operand into a next operation and carrying an a priori carry-in into the next operation, wherein a value of the a priori carry-in depends on the operation, the next operation being performed on corresponding second portions of the first operand and the second operand based on the selection; and

storing, in a memory, a result formed from outputs of the operation and the next operation.

2. The method of claim 1 , wherein the element includes a least significant portion, and

wherein the determining further includes setting the bit of the mask indicating that the a priori carry-in is carried into the operation performed on corresponding least significant portions of the first operand and the second operand.

3. The method of claim 2 , further comprising setting the a priori carry-in to a first value when the operation is any one of a subtracting operation, an inverting operation, and a comparing operation.

4. The method of claim 2 , further comprising:

setting the a priori carry-in to a first value when the operation is an absolute value operation on positive-signed operands; and

setting the a priori carry-in to a second value different than the first value when the operation is an absolute value operation on negative-signed operands.

5. The method of claim 1 , wherein the element includes a least significant portion and a next-least significant portion, and

wherein the method further comprises:

carrying the a priori carry-in into the operation performed on corresponding least significant portions of the first operand and the second operand, the output of the operation being a carry-out; and

carrying the carry-out into the next operation performed on corresponding next-least significant portions of the first operand and the second operand.

6. The method of claim 1 , wherein a size of each of the first portion and the second portion is equal to the selected size of the element, and

wherein the method further comprises carrying a first a priori carry-in into the operation performed on the corresponding first portions of the first operand and the second operand, and carrying a second a priori carry-in into the next operation performed on the corresponding second portions of the first operand and the second operand.

7. The method of claim 1 , wherein the operation and the next operation each includes a round constant,

wherein the selecting includes selecting whether to carry into the next operation a first partial result and a second partial result of the operation performed on the round constant and on the corresponding first portions of the first operand and the second operand, the next operation being performed on the corresponding second portions of the first operand and the second operand, based on the selection of the first partial result and the second partial result, and

wherein carrying the second partial result represents carrying a two from the operation into the next operation.

8. The method of claim 1 , further comprising:

calculating an intermediate partial result from the corresponding first portions of the first operand and the second operand;

determining a carry-indicator for computing a carry-out of the operation, the carry-indicator being indicative of whether the carry-out is generated or a carry-in from a previous operation is propagated;

determining the carry-out based on the carry-indicator and the carry-in from the previous operation; and

determining the partial result of the operation from the intermediate partial result and the carry-in from the previous operation.

9. The method of claim 8 , wherein the determining the partial result of the operation includes computing the partial result from the intermediate partial result and the carry-in from the previous operation.

10. The method of claim 8 , wherein the determining the partial result of the operation includes selecting the partial result using the intermediate partial result and the carry-in from the previous operation.

11. The method of claim 1 , further comprising determining the selected size of the element based on an instruction stored in the memory, the instruction being a construct including the operation, the first operand, and the second operand.

12. The method of claim 11 , further comprising modifying the mask based on the instruction being any one of a lengthening instruction, a narrowing instruction, and a widening instruction.

13. The method of claim 11 , further comprising, when the instruction is any one of a lengthening instruction, a narrowing instruction, and a widening instruction, selecting another mask associated with a second element different than the element, the second element being next larger in size than the element.

14. The method of claim 1 , further comprising performing the next operation on the corresponding second portions of the first operand and the second operand based on the selection.

15. The method of claim 1 , wherein the bits of the mask that controls the plurality of multiplexers comprise more than two bits.

16. A system for performing an operation on operands, each operand including elements of a selectable size, the system comprising:

a memory having computer executable instructions stored thereupon; and

an arithmetic logic unit (ALU) of a plurality of ALUs coupled to the memory, wherein the computer executable instructions, when executed by the ALU, cause the ALU to:

determine a mask based on a selected size of an element;

set a sequence of a plurality of bits of the mask based on the selected size of the element, wherein bits of the mask correspond to an operation performed on portions of the operands;

select, based on a bit, of the plurality of bits of the mask, associated with the ALU, whether to carry a partial result of the operation performed on corresponding first portions of a first operand and a second operand into a next operation or to carry an a priori carry-in into the next operation, wherein a value of the a priori carry-in depends on the operation, the next operation being performed on corresponding second portions of the first operand and the second operand based on the selection; and

store, in the memory, a result formed from outputs of the operation and the next operation,

wherein the ALU is caused to select to carry the a priori carry-in into the next operation when the bit of the mask is set to a first value.

17. The system of claim 16 , wherein the element includes a least significant portion and the ALU is further caused to set the bit of the mask indicating that the a priori carry-in is carried into the operation performed on corresponding least significant portions of the first operand and the second operand.

18. The system of claim 16 , wherein the element includes a least significant portion and a next-least significant portion, and the ALU is further caused to:

carry the a priori carry-in into the operation performed on corresponding least significant portions of the first operand and the second operand, the output of the operation being a carry-out; and

carry the carry-out into the next operation performed on corresponding next-least significant portions of the first operand and the second operand.

19. The system of claim 16 , wherein the ALU is further caused to determine the selected size of the element from the computer executable instructions stored in the memory.

20. The system of claim 16 , wherein the ALU is further caused to perform the next operation on the corresponding second portions of the first operand and the second operand based on the selection.

21. A tangible non-transitory computer-readable storage medium having computer readable instructions stored therein for performing an operation on operands, each operand including elements of a selectable size, wherein the computer readable instructions when executed by an arithmetic logic unit (ALU) of a plurality of ALUs, cause the ALU to:

determine a mask based on a selected size of an element;

select, based on a bit of the mask associated with the ALU, whether to carry a partial result of an operation performed on corresponding first portions of a first operand and a second operand into a next operation or to carry an a priori carry-in into the next operation, wherein a value of the a priori carry-in depends on the operation, the next operation being performed on corresponding second portions of the first operand and the second operand based on the selection; and

store, in a memory, a result formed from outputs of the operation and the next operation,

wherein the operation and the next operation each includes a round constant,

wherein the computer readable instructions further cause the ALU to select whether to carry into the next operation a first partial result and a second partial result of the operation performed on the round constant and on the corresponding first portions of the first operand and the second operand, the next operation being performed on the corresponding second portions of the first operand and the second operand, based on the selection of the first partial result and the second partial result, and

wherein carrying the second partial result represents carrying a two from the operation into the next operation.

Assignments (6)