Granted Patent B2

US 9,703,722 · App. 14/940,679 · Granted Jul 11, 2017

Abstract

Claims (23)

1. A method for compressing data for a translation look aside buffer (TLB), the method comprising:

receiving an identifier at a content addressable memory (CAM), the identifier having a first bit length;

compressing the identifier based on a location within the CAM the identifier is stored, the compressed identifier having a second bit length, the second bit length being smaller than the first bit length; and

mapping at least the compressed identifier to a physical address in a buffer.

2. The method of claim 1 wherein the identifier is at least one of: a Virtual Machine Identifier (VMID) and Address Space Identifier (ASID), the VMID and ASID being parsed from a context associated with a virtual address.

3. The method of claim 2 wherein a context is a logical data structure used by the TLB to identify a page table entry, the page table entry mapping a virtual address associated with the identifier to the physical address.

4. The method of claim 1 wherein compressing includes adjusting an allocation count in an allocation count register, the allocation count register being communicatively coupled to the CAM.

5. The method of claim 4 further comprising:

identifying a replacement identifier in the CAM;

decreasing a first allocation count in the allocation count register corresponding to the replacement identifier in the CAM;

if the identifier is represented in the CAM, increasing a second allocation count in the allocation count register corresponding to the identifier stored in the CAM;

if the identifier is not represented in the CAM, storing the identifier in a free location in the CAM and increasing a second allocation count in the allocation count register corresponding to the identifier stored in free location in the CAM.

6. A system for compressing data for a translation look aside buffer (TLB), the system comprising:

a content addressable memory (CAM) configured to receive an identifier, the CAM further configured to compress the identifier based on a location within the CAM the identifier is stored, the compressed identifier having a second bit length, the second bit length being smaller than the first bit length; and

the TLB configured to map at least the compressed identifier to a physical address.

7. The system of claim 6 wherein the identifier is at least one of: a Virtual Machine Identifier (VMID) and Address Space Identifier (ASID), the VMID and ASID being parsed from a context associated with a virtual address.

8. The system of claim 7 wherein a context is a logical data structure used by the TLB to identify a page table entry, the page table entry mapping a virtual address associated with the identifier to the physical address.

9. The system of claim 6 further comprising an allocation count register configured to store an allocation count, the allocation count register being communicatively coupled to the CAM.

10. The system of claim 9 further comprising a memory management unit configured to:

identify a replacement identifier in the CAM;

decrease a first allocation count in the allocation count register corresponding to the replacement identifier in the CAM;

if the identifier is represented in the CAM, increase a second allocation count in the allocation count register corresponding to the identifier stored in the CAM;

if the identifier is not represented in the CAM, store the identifier in a free location in the CAM and increasing a second allocation count in the allocation count register corresponding to the identifier stored in free location in the CAM.

Assignments (7)