IP Library Granted Patent US 10,452,473
Granted Patent B2
US 10,452,473 · App. 14/976,518 · Granted Oct 22, 2019

Methods for managing failure of a solid state device in a caching storage

Inventors: Saied Kazemi (Mountain View, CA); Siddharth Choudhuri (Irvine, CA)
Assignee: Western Digital Technologies, Inc.
G06F11/1064G06F3/061G06F3/0655G06F3/0689G06F11/141G06F11/2094G06F12/0833G06F12/0868G06F12/0871G06F11/1658G06F2212/604G06F2212/62
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Quick Facts
Patent No.
US 10,452,473
App. No.
14/976,518
Granted
Oct 22, 2019
Kind
B2
Abstract

Techniques for managing caching use of a solid state device are disclosed. In some embodiments, the techniques may be realized as a method for managing caching use of a solid state device. Management of the caching use may include receiving, at a host device, notification of failure of a solid state device. In response to the notification a cache mode may be set to uncached. In uncached mode input/output (I/O) requests may be directed to uncached storage (e.g., disk).

Claims (40)

1. A method for managing caching use of a solid state device comprising:

receiving, at a host device of a memory system, a first notification of failure of a first solid state device that is configured to operate as a cache memory device and is coupled to the host device, wherein the first solid state device is physically or electrically inaccessible to the host device due to the failure, and wherein the first notification comprises a fiber channel registered state change notification (RSCN);

setting, at the host device, a cache mode of the memory system to an uncached mode in response to receiving the first notification, wherein the memory system directs input/output (I/O) requests to a storage device coupled to the host device when the cache mode is the uncached mode;

receiving, at the host device, a second notification about a second solid state device, coupled to the host device, indicating that the second solid state device has been detected for use as a cache memory device;

setting, at the host device, the cache mode of the memory system to a cached mode in response to receiving the second notification;

allocating, at the host device, an amount of cache space of the cache memory device of the second solid state device to an input/output (I/O) generator based on a priority associated with the input/output generator;

receiving information about a source of input/output (I/O) requests; and

excluding the input/output (I/O) requests from input/output (I/O) caching statistics based on the source of the I/O requests.

2. The method of claim 1 , comprising:

prioritizing the input/output (I/O) caching statistics of the cache memory device such that higher ranked input/output (I/O) is flushed from the cache memory device less frequently.

3. The method of claim 2 , wherein the higher ranked input/output (I/O) is based on a predetermined priority associated with an application.

4. The method of claim 2 , wherein the higher ranked input/output (I/O) is based on a predetermined priority associated with a user.

5. The method of claim 1 , comprising:

identifying lower priority applications for which data is less likely to be cached.

6. The method of claim 1 , comprising:

identifying lower priority applications for which data may expire from the cache memory device quicker.

7. The method of claim 1 , wherein the information indicates the source is an application.

8. The method of claim 7 , wherein the application comprises one of a virus scanner, a backup software, a software installer, or a software upgrade.

9. The method of claim 1 , wherein the information indicates the source is associated with a user.

10. The method of claim 1 , wherein the information indicates the source is associated with a group or subnet.

11. A non-transitory computer readable media comprising a series of instructions executable on a computer, wherein when executed by the computer the instructions cause:

receiving, at a host device of a memory system, a first notification of failure of a first solid state device that is configured to operate as a cache memory device and is coupled to the host device, wherein the first solid state device is physically or electrically inaccessible to the host device due to the failure, and wherein the first notification comprises a fiber channel registered state change notification (RSCN);

setting, at the host device, a cache mode of the memory system to an uncached mode in response to receiving the first notification, wherein the memory system is configured to direct input/output (I/O) requests to a storage device coupled to the host device when the cache mode is the uncached mode;

receiving, at the host device, a second notification about a second solid state device, coupled to the host device, indicating that the second solid state device has been detected for use as a cache memory device;

setting, at the host device, the cache mode of the memory system to a cached mode in response to receiving the second notification;

allocating, at the host device, an amount of cache space of the cache memory device of the second solid state device to an input/output (I/O) generator based on a priority associated with the input/output generator;

receiving information about a source of input/output (I/O) requests; and

excluding the input/output (I/O) requests from input/output (I/O) caching statistics based on the source of the I/O requests.

12. The non-transitory computer readable media of claim 11 , wherein the instructions further cause:

prioritizing the input/output (I/O) caching statistics of the cache memory device such that higher ranked input/output (I/O) is flushed from the cache memory device less frequently.

13. The non-transitory computer readable media of claim 12 , wherein the higher ranked input/output (I/O) is based on a predetermined priority associated with an application.

14. The non-transitory computer readable media of claim 12 , wherein the higher ranked input/output (I/O) is based on a predetermined priority associated with a user.

15. The non-transitory computer readable media of claim 7 , wherein the instructions further cause:

identifying lower priority applications for which data is less likely to be cached.

16. The non-transitory computer readable media of claim 7 , wherein the instructions further cause:

identifying lower priority applications for which data may expire from the cache memory device quicker.

17. The non-transitory computer readable media of claim 7 , wherein the information indicates the source is an application.

18. The non-transitory computer readable media of claim 17 , wherein the application comprises one of a virus scanner, a backup software, a software installer, or a software upgrade.

19. The non-transitory computer readable media of claim 7 , wherein the information indicates the source is associated with a user.

20. The non-transitory computer readable media of claim 7 , wherein the information indicates the source is associated with a group or subnet.

Assignments (12)
SECURITY AGREEMENT (SUPPLEMENTAL) Recorded Nov 14, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 069411/0208 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2024
From: SANDISK TECHNOLOGIES, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 069168/0273 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 16, 2018
From: HGST TECHNOLOGIES SANTA ANA, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 046174/0446 →
CHANGE OF NAME Recorded Jan 25, 2016
From: STEC, INC.
To: HGST TECHNOLOGIES SANTA ANA, INC.
Reel/Frame 037583/0684 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 12, 2016
From: KAZEMI, SAIED; CHOUDHURI, SIDDARTH
To: STEC, INC
Reel/Frame 037467/0181 →
Continuity (3)
Continuation 13689074 · Nov 29, 2012
Provisional Application 61651468 · May 24, 2012
Related Publication 20160110251A1 · Apr 21, 2016