Compact electrostatic discharge (ESD) protection structure
A multi-gate Schottky depletion-mode field effect transistor (FET), at least one diode and two resistors comprise a compact electrostatic discharge (ESD) protection structure. This ESD protection structure can be laid out in a smaller area than typical multiple diode ESD devices. The multi-gate FET may comprise various types of high-electron-mobility transistor (HEMT) devices, e.g., (pseudomorphic) pHEMT, (metamorphic) mHEMT, induced HEMT. The multiple gates of the Schottky field effect device are used to form an ESD trigger and charge draining paths for protection of circuits following the ESD protection device. Both single and dual polarity ESD protection devices may be provided on an integrated circuit die for protection of input-output circuits thereof.
1. An electrostatic discharge (ESD) protection device, comprising:
a first field effect transistor (FET) having a drain, at least two gates and a source, wherein the drain thereof is coupled to a node of a circuit to be protected from an ESD event;
at least one first diode having an anode coupled to the source of the first FET;
a first resistor coupled between the at least two gates of the first FET; and
a second resistor coupled to a one of the at least two gates and a cathode of the at least one first diode;
a second field effect transistor (FET) having a drain, at least two gates and a source, wherein the drain thereof is coupled to a power supply common;
at least one second diode having an cathode coupled to the cathode of the at least one first diode;
a third resistor coupled between the at least two gates of the second FET; and
a fourth resistor coupled to a one of the at least two gates of second FET and a cathode of the at least one second diode.
2. The ESD protection device according to claim 1 , wherein one of the at least two gates of the first and second FETs are trigger gates and another one of the at least two gates of the first and second FETs are discharge gates.
3. The ESD protection device according to claim 1 , wherein the at least one first and second diodes are two diodes each connected in series between the sources of the first and second FETs.
4. The ESD protection device according to claim 1 , wherein the power supply common is coupled to an electrical ground.
5. The ESD protection device according to claim 1 , wherein the first and second FETs are depletion-mode FETs.
6. The ESD protection device according to claim 5 , wherein the first and second depletion-mode FETs are high-electron-mobility transistors (HEMTs).
7. The ESD protection device according to claim 6 , wherein the HEMTs are selected from the group consisting of pseudomorphic HEMTs (pHEMTs), metamorphic HEMTs (mHEMTs) and induced HEMTs.
8. The ESD protection device according to claim 1 , wherein the first and second FETs, the at least one first and second diodes and the first, second, third and fourth resistors are fabricated on an integrated circuit die and coupled to the circuit node that is coupled to an external connection of the integrated circuit die.
9. The ESD protection device according to claim 8 , wherein a function of the external connection of the integrated circuit die comprises a radio frequency signal input.
10. The ESD protection device according to claim 8 , wherein a function of the external connection of the integrated circuit die comprises a radio frequency signal output.
11. An electrostatic discharge (ESD) protection device, comprising:
a first field effect transistor (FET) having a drain, at least two gates and a source, wherein the drain thereof is coupled to a node of a circuit to be protected from an ESD event;
a first and second in series connected diodes, wherein an anode of the first and second in series connected diodes is coupled to the source of the first FET;
a first resistor coupled between the at least two gates of the first FET; and
a second resistor coupled to a one of the at least two gates and a cathode of the first and second in series connected diodes;
a second field effect transistor (FET) having a drain, at least two gates and a source, wherein the drain thereof is coupled to a power supply common;
a third and fourth in series connected diodes, wherein a cathode of the third and fourth in series connected diodes is coupled to the cathode of the first and second in series connected diodes;
a third resistor coupled between the at least two gates of the second FET; and
a fourth resistor coupled to a one of the at least two gates of second FET and the cathode of the third and fourth in series connected diodes.
12. The ESD protection device according to claim 11 , wherein one of the at least two gates of the first and second FETs are trigger gates and another one of the at least two gates of the first and second FETs are discharge gates.
13. The ESD protection device according to claim 11 , wherein the power supply common is coupled to an electrical ground.
14. The ESD protection device according to claim 11 , wherein the first and second FETs are depletion-mode FETs.
15. The ESD protection device according to claim 14 , wherein the first and second depletion-mode FETs are high-electron-mobility transistors (HEMTs).
16. The ESD protection device according to claim 15 , wherein the HEMTs are selected from the group consisting of pseudomorphic HEMTs (pHEMTs), metamorphic HEMTs (mHEMTs) and induced HEMTs.
17. The ESD protection device according to claim 11 , wherein the first and second FETs, the at least one first and second diodes and the first, second, third and fourth resistors are fabricated on an integrated circuit die and coupled to the circuit node that is coupled to an external connection of the integrated circuit die.
18. The ESD protection device according to claim 17 , wherein a function of the external connection of the integrated circuit die comprises a radio frequency signal input.
19. The ESD protection device according to claim 18 , wherein a function of the external connection of the integrated circuit die comprises a radio frequency signal output.