IP Library Granted Patent US 9,755,141
Granted Patent B2
US 9,755,141 · App. 15/280,094 · Granted Sep 5, 2017

Method for fabricating MRAM bits on a tight pitch

Inventor: Jordan A. Katine (Mountain View, CA)
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
H01L43/12H01L27/222H01L43/02H01L43/10
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Quick Facts
Patent No.
US 9,755,141
App. No.
15/280,094
Granted
Sep 5, 2017
Kind
B2
Abstract

A method for fabricating magnetoresistive random access memory (MRAM) devices on a tight pitch is provided. The method generally includes etching a pattern of columns into a hardmask layer disposed on a magnetic tunnel junction (MTJ) disposed on a substrate having electrically conductive contacts, the MTJ comprising a tunnel barrier layer between first and second ferromagnetic layers, the pattern of columns aligned to the electrically conductive contacts; etching the first ferromagnetic layer to expose the tunnel barrier layer and to form columns comprising the hardmask layer and the first ferromagnetic layer; forming a passivation layer on the exposed tunnel barrier layer and on top side surfaces of the columns; and etching the passivation layer on the exposed tunnel barrier layer, the exposed tunnel barrier layer, and the second ferromagnetic layer to form columns comprising the hardmask layer, the first ferromagnetic layer, the tunnel barrier layer, and the second ferromagnetic layer.

Claims (24)

1. A method for fabricating a magnetoresistive random access memory (MRAM) device, comprising:

etching a pattern of first columns into a hardmask layer disposed on a magnetic tunnel junction (MTJ) stack that is disposed on a substrate having one or more electrically conductive contacts, wherein the MTJ stack comprises a tunnel barrier layer between first and second ferromagnetic layers, wherein the second ferromagnetic layer is disposed on and in contact with the one or more electrically conductive contacts and the substrate, and wherein the pattern of first columns is aligned to the one or more electrically conductive contacts;

etching the first ferromagnetic layer to expose the tunnel barrier layer and to form second columns comprising the hardmask layer and the first ferromagnetic layer;

forming a passivation layer on the exposed tunnel barrier layer and on top surfaces and side surfaces of the second columns; and

etching the passivation layer on the exposed tunnel barrier layer, the exposed tunnel barrier layer, and the second ferromagnetic layer to form third columns comprising the hardmask layer, the first ferromagnetic layer, the tunnel barrier layer, and the second ferromagnetic layer.

2. The method of claim 1 , wherein a distance between the third columns is less than or equal to 5 times a width of the columns.

3. The method of claim 1 , wherein the hardmask layer comprises TaN.

4. The method of claim 1 , wherein the tunnel barrier layer comprises MgO.

5. The method of claim 1 , wherein the etching a pattern of first columns is performed using ion milling.

6. The method of claim 1 , wherein the passivation layer comprises a dielectric layer.

7. The method of claim 1 , wherein the passivation layer comprises an oxide layer or a nitride layer.

8. The method of claim 1 , wherein the etched second ferromagnetic layer has a width greater than a width of the columns comprising the first ferromagnetic layer and the hardmask layer.

9. A method for fabricating a magnetoresistive random access memory (MRAM) device, comprising:

etching a pattern of first columns into a hardmask layer disposed on a magnetic tunnel junction (MTJ) stack that is disposed on a substrate having one or more electrically conductive contacts, wherein the MTJ stack comprises a tunnel barrier layer between first and second ferromagnetic layers, wherein the second ferromagnetic layer is disposed on and in contact with the one or more electrically conductive contacts and the substrate, and wherein the pattern of first columns is aligned to the one or more electrically conductive contacts, wherein the hardmask layer is disposed on and in contact with the first ferromagnetic layer;

etching the first ferromagnetic layer to expose the tunnel barrier layer and to form second columns comprising the hardmask layer and the first ferromagnetic layer;

forming a passivation layer on the exposed tunnel barrier layer and on top surfaces and side surfaces of the first columns; and

etching the passivation layer on the exposed tunnel barrier layer, the exposed tunnel barrier layer, and the second ferromagnetic layer to form third columns comprising the hardmask layer, the first ferromagnetic layer, the tunnel barrier layer, and the second ferromagnetic layer.

10. The method of claim 9 , wherein a distance between the third columns is less than or equal to 5 times a width of the third columns.

11. The method of claim 9 , wherein the hardmask layer comprises TaN.

12. The method of claim 9 , wherein the tunnel barrier layer comprises MgO.

13. The method of claim 9 , wherein the etching a pattern of first columns is performed using ion milling.

14. The method of claim 9 , wherein the passivation layer comprises a dielectric layer.

15. The method of claim 9 , wherein the passivation layer comprises an oxide layer or a nitride layer.

16. The method of claim 9 , wherein the etched second ferromagnetic layer has a width greater than a width of the columns comprising the first ferromagnetic layer and the hardmask layer.

Assignments (13)
SECURITY AGREEMENT (SUPPLEMENTAL) Recorded Nov 14, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 069411/0208 →
SECURITY AGREEMENT (SUPPLEMENTAL) Recorded Nov 14, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 069411/0486 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 069169/0572 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2024
From: SANDISK TECHNOLOGIES, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 069168/0273 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 6, 2017
From: HGST NETHERLANDS B.V.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 042693/0272 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 4, 2016
From: KATINE, JORDAN A.
To: HGST NETHERLANDS B.V.
Reel/Frame 039930/0851 →
Continuity (2)
Continuation 14728778 · Jun 2, 2015
Related Publication 20170018707A1 · Jan 19, 2017