Virtual timer for data retention
Approaches, techniques, and mechanisms are disclosed for improving data retention using a virtual timer. A memory controller may use a raw bit error rate (RBER) to find an equivalent temperature-accelerated data age of a data item. The data age is computed by using the initial RBER of virtual timing data (VTD) as a virtual write in time of the data item compared to a present time using the current RBER of the VTD. When the data age is determined to exceed a data retention threshold, a data refresh is performed on the data item at the memory block on the memory device. The data age may be stored as virtual timing data on the memory block.
1. A system comprising:
a memory device; and
a flash memory controller in communication with the memory device;
wherein the flash memory controller is configured to write initial virtual timing data (VTD) to a particular memory block on the memory device, receive a write command associated with a particular data item, periodically generate a raw bit error rate (RBER) associated with the initial virtual timing data on the memory device, the particular memory block storing the particular data item, and store a virtual write in time associated with the particular data item based on the generated RBER;
wherein the flash memory controller refreshes the particular data item stored in the particular memory block based at least on the RBER and the virtual write in time.
2. The system as recited in claim 1 , wherein the flash memory controller is further configured to determine a data age associated with the particular data item using a current RBER of the initial VTD as a present time, where the data age comprises the present time minus the virtual write in time.
3. The system as recited in claim 2 , wherein the flash memory controller is further configured to store the data age on a single level cell on the particular memory block.
4. The system as recited in claim 2 , wherein the virtual timing data is provisioned as one or more VTD memory blocks on the memory device.
5. The system as recited in claim 1 , wherein a data retention threshold is based on the memory device, and wherein the flash memory controller refreshes the particular data item additionally based on the data retention threshold.
6. The system as recited in claim 5 , wherein the flash memory controller is further configured to calculate the data retention threshold based on one or more characteristics of the memory device.
7. The system as recited in claim 2 , wherein the flash memory controller is further configured to update the data age upon receiving a read command associated with the particular data item.
8. The system as recited in claim 2 , wherein the flash memory controller is further configured to periodically monitor the data age to determine the data age exceeds the data retention threshold.
9. The system as recited in claim 2 , wherein the flash memory controller is further configured to determine the data age after the system is in a power-off mode.
10. The system as recited in claim 1 , wherein the flash memory controller is further configured to use a block access protocol.
11. The system as recited in claim 1 , wherein the memory device is a double data rate (DDR) synchronous dynamic random-access memory (SDRAM), a flash memory, or a combination thereof.
12. The system as recited in claim 1 , wherein the VTD comprises a data structure having one or more data age values associated with the particular data item, the one or more data age values mapped to a location of the particular memory block storing the particular data item on the memory device.
13. A memory module comprising:
a memory device comprising a single level cell memory block comprising virtual timing data (VTD) written during initialization, the memory device further comprising an available memory block and another available memory block; and
a memory controller configured to interface with the memory device, the memory controller further configured to receive a write command associated with a particular data item, periodically generate a raw bit error rate (RBER) associated with the VTD stored on the single level cell memory block on the memory device, determine a data age associated with the particular data item based on the RBER, store the data age on the available memory block, and responsive to determining the data age exceeds a data retention threshold, writing the particular data item to the another available memory block on the memory device.
14. The memory module as recited in claim 13 , further comprising a plurality of NAND flash memory devices, each NAND flash memory device having a device endurance factor affecting the data threshold associated with the each NAND flash memory device, wherein the memory device is one of the plurality of NAND flash memory devices.
15. A method comprising:
receiving a host command from a host memory controller, the host command associated with a write transaction;
generating a module command by a flash memory controller, the module command generated for the write transaction upon the flash memory controller receiving the host command;
sending the module command to a memory device;
periodically generating a raw bit error rate (RBER) associated with a particular memory block on the memory device, the particular memory block storing initial virtual timing data (VTD);
determining a virtual write in time associated with a particular data item based on the RBER of the initial VTD;
storing the virtual write in time on the particular memory block; and
refreshing the particular data item based at least on the RBER and the virtual write in time.
16. The method as recited in claim 15 , further comprising:
determining a data age of the particular data item, the data age comprising a present time computed as current RBER of the initial VTD minus the virtual write in time;
wherein the refreshing the particular data item is in response to determining that the data age exceeds a data retention threshold.
17. The method as recited in claim 16 , wherein the data age is stored on a single level cell on the particular memory block.
18. The method as recited in claim 16 , wherein the virtual timing data is provisioned as one or more VTD memory blocks on the memory device.
19. The method as recited in claim 16 , wherein the data retention threshold is based on the memory device.
20. The method as recited in claim 16 , wherein the flash memory controller is further configured to calculate the data retention threshold based on one or more characteristics of the memory device.
21. The method as recited in claim 16 , wherein the flash memory controller is further configured to update the data age upon receiving a read command associated with the particular data item.
22. The method as recited in claim 16 , wherein the flash memory controller is further configured to periodically monitor the data age to determine whether the data age exceeds the data retention threshold.