Apparatuses and methods to control body potential in 3D non-volatile memory operations
Some embodiments include apparatuses and methods having a memory cell string including memory cells located in different levels of the apparatus and a data line coupled to the memory cell string. The memory cell string includes a pillar body associated with the memory cells. At least one of such apparatus can include a module configured to store information in a memory cell among memory cells and/or to determine a value of information stored in a memory cell among memory cells. The module can also be configured to apply a voltage having a positive value to the data line and/or a source to control a potential of the body. Other embodiments are described.
1. An apparatus comprising:
a memory cell string including memory cells located in different levels of the apparatus, the memory cell string including a body associated with the memory cells;
a source coupled to the memory cell string;
a data line coupled to the memory cell string; and
a module configured to perform a write stage to store information in a memory cell among the memory cells, to perform a write verify stage to determine whether a value of information stored in the memory cell reaches a target value, and to apply a voltage having a positive value to the data line during a stage between the write stage and the write verify, wherein the memory cell string is included in a select block of a memory device, and the module is configured to put a select gate in an unselected block of the memory device in a float condition.
2. The apparatus of claim 1 , wherein the module is configured to apply a voltage having ground potential to a control gate associated with the memory cell string during the stage between the write stage and the write verify stage.
3. The apparatus of claim 2 , wherein the memory cell string is included in a select block of a memory device, and the module is configured to put a control gate in an unselected block of the memory device in a float condition.
4. An apparatus comprising:
a memory cell string including memory cells located in different levels of the apparatus, the memory cell string including a body associated with the memory cells;
a source coupled to the memory cell string;
a data line coupled to the memory cell string; and
a module configured to perform a write stage to store information in a memory cell among the memory cells, to perform a write verify stage to determine whether a value of information stored in the memory cell reaches a target value, and to apply a voltage having a positive value to the data line during a stage between the write stage and the write verify, wherein the module is configured to apply round potential to a select gate associated with a select transistor of the memory cell string during the stage between the write stage and the write verify stage, and wherein the memory cell string is included in a select block of a memory device, and the module is configured to put a select gate in an unselected block of the memory device in a float condition.
5. The apparatus of claim 1 , wherein the module is configured to:
apply a voltage having a positive value to a control gate associated with the memory cell string during a first time interval of the stage between the write stage and the write verify stage; and
apply a voltage having ground potential to the control gate during a second time interval of the stage between the write stage and the write verify stage.
6. An apparatus comprising:
a memory cell string including memory cells located in different levels of the apparatus, the memory cell string including a body associated with the memory cells;
a source coupled to the memory cell string;
a data line coupled to the memory cell string; and
a module configured to perform a write stage to store information in a memory cell among the memory cells, to perform a write verify stage to determine whether a value of information stored in the memory cell reaches a target value, and to apply a voltage having a positive value to the data line during a stage between the write stage and the write verify, wherein the module is configured to apply a voltage having a positive value to a control gate associated with the memory cell string during a first time interval of the stage between the write stage and the write verify stage, and apply a voltage having ground potential to the control gate during a second time interval of the stage between the write stage and the write verify stage, and wherein the memory cell string is included in a select block of a memory device, and the module is configured to:
apply a voltage having ground potential to a control gate in an unselected block of the memory device during the first time; and
put the control gate in the unselected block in a float condition during the second time interval.
7. The apparatus of claim 1 , wherein the module is configured to:
apply a voltage having a positive value to a select gate associated with a select transistor of the memory cell string during a first time interval of the stage between the write stage and the write verify stage; and
apply a voltage having ground potential to the select gate during a second time interval of the stage between the write stage and the write verify stage.
8. An apparatus comprising:
a memory cell string including memory cells located in different levels of the apparatus, the memory cell string including a body associated with the memory cells;
a source coupled to the memory cell string;
a data line coupled to the memory cell string; and
a module configured to perform a write stage to store information in a memory cell among the memory cells, to perform a write verify stage to determine whether a value of information stored in the memory cell reaches a target value, and to apply a voltage having a positive value to the data line during a stage between the write stage and the write verify, wherein the module is configured to apply a voltage having a positive value to a select gate associated with a select transistor of the memory cell string during a first time interval of the stage between the write stage and the write verify stage, and apply a voltage having ground potential to the select gate during a second time interval of the stage between the write stage and the write verify stage, and wherein the memory cell string is included in a select block of a memory device, and the module is configured to:
apply a voltage having ground potential to a control gate in an unselected block of the memory device during the first time; and
put the control gate in the unselected block in a float condition during the second time interval.
9. An apparatus comprising:
a memory cell string including memory cells located in different levels of the apparatus, the memory cell string including a body associated with the memory cells;
a source coupled to the memory cell string;
a data line coupled to the memory cell string; and
a module configured to perform a write stage to store information in a memory cell among the memory cells, to perform a write verify stage to determine whether a value of information stored in the memory cell reaches a target value, and to apply a voltage having a positive value to the source during a stage between the write stage and the write verify, wherein the memory cell string is included in a select block of a memory device, and the module is configured to put a select gate in an unselected block of the memory device in a float condition.
10. The apparatus of claim 9 , wherein the module is configured to apply a voltage having ground potential to a control gate associated with the memory cell string during the stage between the write stage and the write verify stage.
11. The apparatus of claim 10 , wherein the memory cell string is included in a select block of a memory device, and the module is configured to put a control gate in an unselected block of the memory device in a float condition.
12. An apparatus comprising:
a memory cell string including memory cells located in different levels of the apparatus, the memory cell string including a body associated with the memory cells;
a source coupled to the memory cell string;
a data line coupled to the memory cell string; and
a module configured to perform a write stage to store information in a memory cell among the memory cells, to perform a write verify stage to determine whether a value of information stored in the memory cell reaches a target value, and to apply a voltage having a positive value to the source during a stage between the write stage and the write verify, wherein the module is configured to apply ground potential to a select gate associated with a select transistor of the memory cell string during the stage between the write stage and the write verify stage, and wherein the memory cell string is included in a select block of a memory device, and the module is configured to put a select gate in an unselected block of the memory device in a float condition.
13. The apparatus of claim 9 , wherein the module is configured to:
apply a voltage having a positive value to a control gate associated with the memory cell string during a first time interval of the stage between the write stage and the write verify stage; and
apply a voltage having ground potential to the control gate during a second time interval of the stage between the write stage and the write verify stage.
14. An apparatus comprising:
a memory cell string including memory cells located in different levels of the apparatus, the memory cell string including a body associated with the memory cells;
a source coupled to the memory cell string;
a data line coupled to the memory cell string; and
a module configured to perform a write stage to store information in a memory cell among the memory cells, to perform a write verify o determine whether a value of information stored in the memory cell reaches a target value, and to apply a voltage having a positive value to the source during a stage between the write stage and the write verify, wherein the module is configured to apply a voltage having a positive value to a control gate associated with the memory cell string during a first time interval of the stage between the write stage and the write verify stage, and apply a voltage having ground potential to the control gate during a second time interval of the stage between the write stage and the write verify stage, wherein the memory cell string is included in a select block of a memory device, and the module is configured to:
apply a voltage having ground potential a control gate in an unselected block of the memory device during the first time; and
put the control gate in the unselected block in a float condition during the second time interval.
15. The apparatus of claim 9 , wherein the module is configured to:
apply a voltage having a positive value to a select gate associated with a select transistor of the memory cell string during a first time interval of the stage between the write stage and the write verify stage; and
apply a voltage having ground potential to the select gate during a second time interval of the stage between the write stage and the write verify stage.
16. An apparatus comprising:
a memory cell string including memory cells located in different levels of the apparatus, the memory cell string including a body associated with the memory cells;
a source coupled to the memory cell string;
a data line coupled to the memory cell string; and
a module configured to perform a write stage to store information in a memory cell among the memory cells, to perform a write verify stage to determine whether a value of information stored in the memory cell reaches a target value, and to apply a voltage having a positive value to the source during a stage between the write stage and the write verify, wherein the module is configured to apply a voltage having a positive value to a select gate associated with a select transistor of the memory cell string during a first time interval of the stage between the write stage and the write verify stage, and apply a voltage having ground potential to the select gate during a second time interval of the stage between the write stage and the write verify stage, and wherein the memory cell string is included in a select block of a memory device, and the module is configured to:
apply a voltage having ground potential a control gate in an unselected block of the memory device during the first time; and
put the control gate in the unselected block in a float condition during the second time interval.
17. A method comprising:
storing information, during a write stage of memory device, in a selected memory cell among memory cells of a memory cell string of the memory device, the memory cells of the memory cell string located in different levels of the memory device, the memory cell string including a body associated with the memory cells, wherein the memory cell string is included in a select block of the memory device;
determining, during a write verify stage of the memory device, whether a value of the information stored in the selected memory cell reaches a target value;
applying a voltage having a positive value to at least one of a data line coupled to the memory cell string and a source coupled to the memory cell string during a stage between the write stage and the write verify stage; and
putting a select gate in an unselected block of the memory device in a float condition.
18. The method of claim 17 , further comprising:
applying a voltage having ground potential to at least one of a control gate and a select gate associated with the memory cell string during the stage between the write stage and the write verify stage.