IP Library Granted Patent US 10,453,761
Granted Patent B2
US 10,453,761 · App. 15/395,169 · Granted Oct 22, 2019

External gettering method and device

Inventors: Michael Tan (Singapore, SG); Cheng P. Pour (Singapore, SG)
Assignee: Micron Technology, Inc.
H01L23/26H01L21/3221H01L21/3225H01L21/565H01L23/3128H01L23/564H01L27/14698H01L31/186H01L51/5259H01L2224/16225H01L2924/15311Y10T428/28
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Quick Facts
Patent No.
US 10,453,761
App. No.
15/395,169
Granted
Oct 22, 2019
Kind
B2
Abstract

Disclosed embodiments include external gettering provided by electronic packaging. An external gettering element for a semiconductor substrate, which may be incorporated as part of an electronic packaging for the structure, is disclosed. Semiconductor structures and stacked semiconductor structures including an external gettering element are also disclosed. An encapsulation mold compound providing external gettering is also disclosed. Methods of fabricating such devices are also disclosed.

Claims (15)

1. An integrated circuit comprising:

a semiconductor substrate;

at least one semiconductor device formed on a first section of said semiconductor substrate; and

electronic packaging external to said semiconductor substrate,

wherein at least a portion of said electronic packaging adjacent to a second section of said semiconductor substrate comprises a gettering material and an adhesive material applied at a backside of said semiconductor substrate,

wherein said gettering material is configured to attract contaminants within said semiconductor substrate away from said first section,

wherein said gettering material is separate from said adhesive material,

wherein said electronic packaging comprises an encapsulation mold compound surrounding at least a portion of said semiconductor substrate, and

wherein at least a portion of said encapsulation mold compound is embedded with additives in order to attract ions or contaminants within said semiconductor substrate toward said second section.

2. The integrated circuit of claim 1 , wherein said gettering material is imbued with particular polarities or quantities of ions in order to attract the ions or contaminants within said semiconductor substrate toward said second section.

3. The integrated circuit of claim 1 , wherein all of said encapsulation mold compound is embedded with said additives.

4. The integrated circuit of claim 1 , wherein said electronic packaging comprises a plurality of solder bumps formed on said at least one semiconductor device.

5. The integrated circuit of claim 1 , wherein said gettering material is arranged adjacent a majority of said second section of said semiconductor substrate.

6. The integrated circuit of claim 1 , further comprising an internal gettering section between said first section and said gettering material.

7. The integrated circuit of claim 1 , wherein said adhesive material is configured to adhere said gettering material to said section of said semiconductor substrate.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050695/0825 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 25, 2019
From: TAN, MICHAEL; POUR, CHENG P.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 049862/0741 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
SUPPLEMENT NO. 3 TO PATENT SECURITY AGREEMENT Recorded Feb 10, 2017
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041675/0105 →
Continuity (3)
Division 14931806 · Nov 3, 2015
Division 13024806 · Feb 10, 2011
Related Publication 20170110381A1 · Apr 20, 2017