Semiconductor package and method of manufacturing the same

1. A method of manufacturing a semiconductor package, the method comprising:

coating a flux on a connection pad provided on a first surface of a substrate, the flux including carbon nanotubes (CNTs);

placing a solder ball on the connection pad coated with the flux;

forming a solder layer attached to the connection pad from the solder ball through a reflow process; and

mounting a semiconductor chip on the substrate such that the solder layer faces a connection pad in the semiconductor chip,

wherein an amount of the CNTs in the flux ranges from about 0.01 wt % to about 1 wt %.

2. The method of claim 1 , wherein a hydrophilic functional group is attached to the CNTs in the flux.

3. The method of claim 2 , wherein the hydrophilic functional group is at least one selected from a group consisting of a hydroxy group, an alkoxy group, a nitro group, a cyano group, an amino group, an azido group, an amidino group, a hydrazino group, a hydrazono group, a carbonyl group, a carbamyl group, a thiol group, an allylamin group, an ether group, an ester group, a carboxyl group, salt of the carboxyl group, a sulfonic acid group, a trimethoxysilane group (—Si(OCH 3 ) 3 ), and a trichlorosilane group (—SiCl 3 ).

4. The method of claim 1 , wherein the amount of the CNTs in the flux ranges from about 0.4 wt % to about 0.8 wt %.

5. The method of claim 1 , wherein the CNTs comprise at least one selected from a group consisting of single-wall CNTs, double-wall CNTs, multi-wall CNTs, and CNT ropes.

6. The method of claim 1 , wherein coating the flux includes forming a contact angle of less than 60 degrees between the connection pad and the flux.

7. The method of claim 1 , wherein the substrate is a printed circuit board (PCB), a flexible printed circuit board (FPCB), or an interposer.

8. The method of claim 1 , wherein forming the solder layer includes forming a flux remaining layer by the flux remaining on side walls of the solder layer or an upper surface of the connection pad.

9. The method of claim 8 , further comprising:

after forming the solder layer, performing a cleaning process for at least partially removing the flux remaining layer.

10. The method of claim 8 , further comprising:

after mounting the semiconductor chip on the substrate, performing a cleaning process for at least partially removing the flux remaining layer.

11. A method of manufacturing a semiconductor package, the method comprising:

coating a flux on a connection pad provided on a first surface of a substrate, the flux including carbon nanotubes (CNTs), a hydrophilic functional group being attached to the CNTs;

placing a solder ball on the connection pad coated with the flux;

forming a solder layer attached to the connection pad from the solder ball through a reflow process; and

mounting a semiconductor chip on the substrate such that the solder layer faces a connection pad provided in the semiconductor chip.

12. The method of claim 11 , wherein an amount of the CNTs in the flux ranges from about 0.4 wt % to about 0.8 wt %.

13. The method of claim 11 , wherein coating the flux includes forming a contact angle of less than 60 degrees between the connection pad and the flux.

14. The method of claim 11 , wherein forming the solder layer includes forming a flux remaining layer by the flux remaining on side walls of the solder layer or an upper surface of the connection pad.

15. A method of manufacturing a semiconductor package, the method comprising:

providing a connection pad on a surface of a substrate;

coating a flux on the connection pad, the flux including a flux agent having carbon nanotubes (CNTs) and a hydrophilic functional group attached to the CNTs;

placing a solder ball on the connection pad coated with the flux;

performing a reflow process to the solder ball such that the solder ball contacts the connection pad through the flux and the flux at least partially covers lower sides of sidewalls of the solder ball and the substrate; and

mounting a semiconductor chip on the substrate such that a reflowed structure of the solder ball faces a connection pad in the semiconductor chip.

16. The method of claim 15 , wherein the hydrophilic functional group is at least one selected from a group consisting of a hydroxy group, an alkoxy group, a nitro group, a cyano group, an amino group, an azido group, an amidino group, a hydrazino group, a hydrazono group, a carbonyl group, a carbamyl group, a thiol group, an allylamin group, an ether group, an ester group, a carboxyl group, salt of the carboxyl group, a sulfonic acid group, a trimethoxysilane group (—Si(OCH 3 ) 3 ), and a trichlorosilane group (—SiCl 3 ).

17. The method of claim 15 , further comprising:

performing a cleaning process for at least partially removing the flux coated on the connection pad, the performing occurring after performing the reflow process to the solder ball.

18. The method of claim 15 , wherein an amount of the CNTs in the flux is about 1 wt % or less.

19. The method of claim 18 , wherein the amount of the CNTs in the flux ranges between about 0.4 wt % and about 0.8 wt %.