FinFET with isolated source and drain
A FinFET has shaped epitaxial structures for the source and drain that are electrically isolated from the substrate. Shaped epitaxial structures in the active region are separated from the substrate in the source and drain regions while those in the channel region remain. The gaps created by the separation in the source and drain are filled with electrically insulating material. Prior to filling the gaps, defects created by the separation may be reduced.
1. A method, comprising:
providing a semiconductor structure, the structure comprising: a semiconductor substrate; at least one semiconductor fin having a substantially uniform material composition, the fin coupled to the semiconductor substrate and surrounded at a bottom portion thereof by a dielectric layer, and an active region having a source region, a drain region and a channel region therebetween, the active region comprising a layer of epitaxy surrounding a top portion of the at least one semiconductor fin, a dummy gate encompassing the channel region and a spacer on either side of the dummy gate;
physically separating the top portion of the at least one semiconductor fin from the bottom portion of the at least one semiconductor fin in the source region and the drain region, the physically separating forming gaps, wherein the physically separating comprises:
recessing the dielectric layer surrounding the bottom portion of the at least one semiconductor fin, the recessing exposing a center portion of the at least one semiconductor fin between the top portion and the bottom portion; and
removing the center portion exposed by the recessing, the removing including anisotropically etching the at least one fin and the layer of epitaxy surrounding the fin, wherein the layer of epitaxy has a crystal orientation that is selective to the etching, such that the center portion is removed without substantially reducing the size of the epitaxial layer; and
after the physically separating, forming a continuous dielectric layer in the gaps and around the layer of epitaxy in the source region and the drain region.
2. The method of claim 1 , further comprising:
after the physically separating and before forming the continuous dielectric layer, reducing defects in the layer of epitaxy and the lower portion of the at least one semiconductor fin resulting from the physically separating.
3. The method of claim 1 , wherein the semiconductor structure further comprises at least one other type of semiconductor device, the method further comprising masking the at least one other type of semiconductor device prior to the physically separating.
4. The method of claim 2 , wherein reducing defects comprises oxidizing to form oxide around the layer of epitaxy in the source region and the drain region and over the bottom portion of at least one semiconductor fin.
5. The method of claim 1 , wherein the center portion of the at least one semiconductor fin has a length of about 5 nm to about 10 nm.
6. The method of claim 1 , wherein the semiconductor substrate comprises a bulk semiconductor substrate, wherein the at least one semiconductor fin comprises a plurality of semiconductor fins, and wherein the physically separating and the forming are performed for one or more of the plurality of semiconductor fins.
7. The method of claim 1 , wherein the semiconductor structure comprises at least two different types of semiconductor devices, and wherein the physically separating and the forming are performed for at least one of the at least two different types of semiconductor devices.
8. The method of claim 1 , wherein the epitaxy comprises epitaxial silicon.
9. The method of claim 1 , wherein the epitaxy comprises epitaxial silicon germanium.
10. The method of claim 1 , wherein the epitaxy comprises at least one material from each of periodic table column III and column V.
11. The method of claim 1 , wherein the epitaxy comprises at least one material from each of periodic table column II and column VI.
12. The method of claim 1 wherein the layer of epitaxy has a 111 crystal orientation.
13. The method of claim 12 wherein the fin has one of a 100 crystal orientation and a 110 crystal orientation.
14. The method of claim 1 wherein the crystal orientation of the fin is etched at a rate that is greater than or equal to 10 times the rate that the crystal orientation of the layer of epitaxy is etched.