Doherty power amplifier combiner with tunable impedance termination circuit
Doherty power amplifier combiner with tunable impedance termination circuit. A signal combiner can include a balun transformer circuit having a first coil and a second coil. The first coil can be implemented between a first port and a second port. The second coil can be implemented between a third port and a fourth port. The first port and the third port can be coupled by a first capacitor. The second port and fourth port can be coupled by a second capacitor. The first port can be configured to receive a first signal. The fourth port can be configured to receive a second signal. The second port can be configured to yield a combination of the first signal and the second signal. The signal combiner can include a termination circuit that couples the third port to a ground. The termination circuit can include a tunable impedance circuit.
1. A signal combiner comprising:
a first input port configured to receive a carrier-amplified signal of a Doherty power amplifier;
a second input port configured to receive a peaking-amplified signal of the Doherty power amplifier;
an output port configured to output a combination of signals received at the first input port and at the second input port;
a transformer circuit having a first coil and a second coil, the first coil implemented between a first transformer port and a second transformer port, the second coil implemented between a third transformer port and a fourth transformer port, the first transformer port and the third transformer port coupled by a first capacitor, the second transformer port and the fourth transformer port coupled by a second capacitor, the first transformer port coupled to the first input port, the second transformer port coupled to the output port, and the fourth transformer port coupled to the second input port; and
a termination circuit that couples the third port to a ground, the termination circuit including a tunable impedance circuit, the termination circuit including a harmonic rejection circuit configured to reduce the strength of one or more harmonics at the second transformer port.
2. The method of claim 1 wherein the harmonic rejection circuit includes a plurality of resonant elements connected in series, each one of the plurality of resonant elements including an inductor and a capacitor connected in parallel.
3. The method of claim 2 wherein each one of the plurality of resonant elements has a resonant frequency approximately equal to a multiple of an operating frequency of the signal combiner.
4. The method of claim 3 wherein each one of the plurality of resonant elements has a resonant frequency approximately equal to twice a respective operating frequency of the signal combiner.
5. A method of combining signals from a Doherty power amplifier (PA) using a signal combiner, the method comprising:
receiving a first input signal at a first input port, the first input signal comprising a carrier-amplified signal of a Doherty PA;
receiving a second input signal at a second input port, the second input signal comprising a peaking-amplified signal of a Doherty PA;
combining the first input signal and the second input signal using a transformer circuit having a first coil and a second coil, the first coil implemented between a first transformer port and a second transformer port, the second coil implemented between a third transformer port and a fourth transformer port, the first transformer port and the third transformer port coupled by a first capacitor, the second transformer port and the fourth transformer port coupled by a second capacitor, the first transformer port configured to receive the first input signal, the fourth transformer port configured to receive the second input signal, the second port configured to yield a combination of the first input signal and the input second signal;
reducing a strength of one or more harmonics at the second transformer port using a harmonic rejection circuit that couples the third transformer port to a ground; and
outputting the combination of the first input signal and the second input signal at an output port.
6. The method of claim 5 further comprising tuning the first capacitor or the second capacitor in response to receiving a band select signal.
7. The method of claim 5 wherein reducing the strength of one or more harmonics further includes using a tunable impedance circuit that couples the third transformer port to the ground.
8. The method of claim 7 wherein the tunable impedance circuit includes a plurality of capacitors, each one of the plurality of capacitors having a capacitance approximately equal to a multiplicative inverse of two times pi times a respective operating frequency of the Doherty PA times a characteristic impedance of a load coupled to the Doherty PA.
9. The method of claim 7 further comprising tuning the tunable impedance circuit to have a capacitance approximately equal to a multiplicative inverse of two times pi times the operating frequency times a characteristic impedance of a load coupled to the Doherty PA in response to receiving a band select signal indicative of an operating frequency.
10. The method of claim 9 further comprising tuning the first capacitor and the second capacitor to have a capacitance approximately equal to half the capacitance of the tunable impedance circuit.
11. The method of claim 7 wherein the tunable impedance matching circuit includes a plurality of impedance elements connected in parallel, each one of the plurality of impedance elements including an impedance and a switch connected in series.
12. The method of claim 7 wherein the harmonic rejection circuit is implemented between the third transformer port and the tunable impedance circuit.