IP Library Granted Patent US 10,410,882
Granted Patent B2
US 10,410,882 · App. 15/847,687 · Granted Sep 10, 2019

Solder bond site including an opening with discontinuous profile

Inventors: Jaspreet S. Gandhi (Milpitas, CA); Dale Arnold (Meridian, ID)
Assignee: Micron Technology, Inc.
H01L21/4846C23C18/32H01L21/481H01L21/4853H01L23/49811H01L23/49838H01L23/49894H01L24/16H01L24/13H01L2224/13025H01L2224/16227H01L2224/16237
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,410,882
App. No.
15/847,687
Granted
Sep 10, 2019
Kind
B2
Abstract

Apparatuses and methods for formation of a bond site including an opening with a discontinuous profile are disclosed herein. An example apparatus may at least include a substrate, a contact on the substrate, and a mask layer formed on the substrate and at least a portion of the contact. The mask layer may also include an opening formed therein, with the opening having a discontinuous profile from a top surface of the mask layer to the contact.

Claims (32)

1. A method, comprising:

forming a masking layer defined by a discontinuous profile of the masking layer on a substrate including a contact;

forming a first metal layer on a contact of the substrate; and

forming a second metal layer on the first metal layer, wherein forming the second metal layer comprises forming a top surface of the second metal layer below a top surface of the masking layer defined by the discontinuous profile.

2. The method of claim 1 , wherein forming the masking layer defined by a discontinuous profile on the substrate comprises:

etching a first opening defined by a first sidewall extending from a top surface of the masking layer to a step; and

etching a second opening defined by a second sidewall extending from the step and terminating at the contact.

3. The method of claim 2 , wherein a “leaky chrome” process is used to etch the first opening and to etch the second opening.

4. The method of claim 2 , wherein the first opening has a larger diameter than a diameter of the second opening.

5. The method of claim 4 , wherein the first sidewall extends at an angle from the top surface of the masking layer to a first edge of the step, and the second sidewall extends from a second edge of the step to the contact.

6. The method of claim 4 , wherein the second opening exposes a portion of the contact.

7. The method of claim 2 , wherein the first metal layer is formed in the second opening of the masking layer.

8. The method of claim 1 , wherein forming the first metal layer on the contact comprises an electroless plating process, and wherein forming the second metal layer on the first metal layer comprises a gold immersion plating process.

9. The method of claim 1 , wherein the discontinuous profile is characterized by an angled first sidewall extending from a top surface of the masking layer to an outer edge of a step, and a second sidewall extending from an inner edge of the step toward the contact, wherein the first sidewall is set back from the second sidewall.

10. The method of claim 1 , further comprising:

forming the contact on the substrate; and

etching the contact into a pedestal shape on the substrate.

11. A method, comprising:

forming a solder mask layer on a contact of a substrate;

etching from a top surface of the solder mask layer to a step of the solder mask layer to form a first profile of the solder mask layer;

etching from the step of the solder mask layer to a top surface of the contact to form a second profile of the solder mask layer;

forming a first metal layer on a contact of the substrate, a portion of the first metal layer formed above the step of the solder mask layer; and

forming a second metal layer on the first metal layer, wherein forming the second metal layer on the first metal layer comprises forming a top surface of the second metal layer below the top surface of the solder mask layer.

12. The method of claim 11 , wherein forming the first metal layer on the contact of the substrate comprises forming the first metal layer in an area defined by the second profile of the solder mask layer.

13. The method of claim 12 , wherein the area defined by the second profile of the solder mask layer includes two sidewalls of the solder mask layer extending perpendicularly from the step of the solder mask layer to the contact.

14. The method of claim 11 , wherein forming the second metal layer on the first metal layer comprises forming a portion of the second metal layer above the step of the solder mask layer.

15. The method of claim 11 , wherein forming the second metal layer on the first metal layer comprises forming the second metal layer in an area partially defined by the first profile of the solder mask layer.

16. The method of claim 11 , wherein forming the second metal layer on the first metal layer comprises forming a portion of the second metal layer on the step of the solder mask layer.

17. The method of claim 11 , wherein the step of the solder mask layer is between the top surface of the solder mask layer and a top surface of the contact.

18. The method of claim 11 , wherein a portion of the solder mask layer is formed on the substrate.

19. The method of claim 18 , wherein the portion of the solder mask layer formed on the substrate is defined by a pedestal shape of the contact on the substrate.

20. The method of claim 11 , wherein the first metal layer is formed from nickel and the second metal layer is formed from gold.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050716/0678 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
SUPPLEMENT NO. 7 TO PATENT SECURITY AGREEMENT Recorded Feb 6, 2018
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 045267/0833 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 19, 2017
From: GANDHI, JASPREET S.; ARNOLD, DALE
To: MICRON TECHNOLOGY, INC.
Reel/Frame 044441/0415 →
Continuity (2)
Division 14798261 · Jul 13, 2015
Related Publication 20190074194A1 · Mar 7, 2019