IP Library Granted Patent US 10,510,405
Granted Patent B2
US 10,510,405 · App. 15/882,937 · Granted Dec 17, 2019

Soft information module

Inventors: Richard David Barndt (San Diego, CA); Xinde Hu (San Jose, CA); Anthony Dwayne Weathers (San Diego, CA)
Assignee: Western Digital Technologies, Inc.
G11C11/5642G06F11/1048G11C11/5628G11C16/08G11C16/3454H03M13/1105H03M13/1111G06F11/008G06F11/08G11C16/3422G11C2211/5641
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Quick Facts
Patent No.
US 10,510,405
App. No.
15/882,937
Filed
Jan 29, 2018
Granted
Dec 17, 2019
Kind
B2
Art Unit
2111
USPC
714/763
Abstract

A soft information module is coupled between one or more flash memory devices and a decoder. The soft information module receives a putative value of one or more memory cells of the one or more flash memory devices based on a read of the one or more memory cells at an initial read level, and one or more respective indicators of whether the putative value was read at one or more respective different read levels offset from the initial read level, and receives a page indicator for the read. The soft information module determines a cell program region for the read based on the putative value, the one or more respective indicators, and the page indicator, identifies a predetermined confidence value for the region, and provides the confidence value to the decoder for association with the putative value, the confidence value being representative of a likelihood that the one or more memory cells was programmed to the putative value.

Claims (73)

1. A storage device, comprising:

one or more flash memory devices comprising a plurality of memory cells; and

a soft information module configured to:

receive initial values of the plurality of memory cells, based on a memory read operation performed on the plurality of memory cells at a plurality of respective different read levels;

receive a value indicating a number of cell program regions associated with the memory read operation;

receive respective values, each of the respective values indicating a particular cell program region assigned to each memory cell of the plurality of memory cells;

determine a count of cells within each cell program region of the number of cell program regions based on the received initial values and the particular cell program region assigned to each memory cell;

generate respective confidence values for respective cell program regions based on the determined counts and the number of cell program regions, a confidence value being representative of a likelihood that a memory cell in a respective cell program region was programmed to a corresponding initial value of the received initial values; and

associate each generated confidence value with respective memory cells assigned to the respective cell program region,

wherein a cell program region of the cell program regions is between two read levels.

2. The storage device of claim 1 , wherein the soft information module is further configured to:

generate a representative confidence value or sign value based on a function of the generated confidence values;

determine whether the generated representative confidence value or sign value satisfies a predetermined threshold;

adjust, in response to the predetermined threshold being met, a read level offset used by the memory read operation for use in a future memory read operation; and

determine a respective read level for the future memory read operation based on varying a first read level by the adjusted offset associated with a respective region.

3. The storage device of claim 2 , wherein the soft information module comprises a hardware accumulator, and wherein the soft information module being configured to generate the representative confidence value or sign value based on a function of the generated confidence values comprises the soft information module being configured to:

provide, to the accumulator, the generated respective confidence values for the respective cell program regions,

wherein the hardware accumulator generates a sum and a count of the generated confidence values,

wherein the representative confidence value or sign value is generated based on a function of the sum and the count generated by the hardware accumulator.

4. The storage device of claim 3 , wherein the soft information module being configured to generate the representative confidence value or sign value based on a function of the generated confidence values further comprises the soft information module being configured to:

provide the determined counts to the accumulator with the generated respective confidence values for the respective cell program regions,

wherein the hardware accumulator is configured to generate the sum and the count of the generated confidence values based on the generated respective confidence values and the determined counts.

5. The storage device of claim 2 , wherein the soft information module is further configured to:

adjust, in response to the predetermined threshold being met, an amount of a variance in the read level offset based on the generated representative confidence value or sign value.

6. The storage device of claim 1 , wherein the soft information module being configured to generate the confidence values for the respective cell program regions based on the determined counts comprises the soft information module being configured to determine an area under respective distribution curves of memory cells for respective cell program regions.

7. The storage device of claim 1 , wherein the soft information module is configured to:

receive the initial values of the plurality of memory cells with a first error indicator in connection with a first reading of the plurality of memory cells; and

in response to the first error indicator, initiate multiple subsequent reads of the plurality of memory cells at one or more different read levels to categorize the plurality of memory cells into the respective cell program regions, wherein the number of cell program regions associated with the memory read operation and the respective cell program regions assigned to each of the plurality of memory cells are received based on the multiple subsequent reads.

8. The storage device of claim 1 , wherein the soft information module comprises at least one binary adder, and wherein the soft information module being configured to determine the count of cells within each cell program region of the number of cell program regions comprises the soft information module being configured to:

provide the respective cell program regions to the at least one binary adder,

wherein the at least one binary adder tallies, for each region of the provided respective cell program regions, a respective number of times a value for the region is equivalent to a binary zero and the number of times the value for the region is equivalent to a binary one.

9. The storage device of claim 8 , wherein the soft information module comprises a first binary adder and a second binary adder, each binary adder being configured to be enabled by a data enable signal, and wherein the soft information module being configured to determine the count of cells within each cell program region of the number of cell program regions comprises the soft information module being configured to:

provide a data enable signal and a page indicator to the first binary adder and the second binary adder, the page indicator indicating a page of the plurality of memory cells for which the memory read operation was performed, the data enable signal being inverted for the second binary adder so that one adder is selected at any one time depending on the value of the data enable signal, wherein the value of the data enable signal is predetermined for each of the provided respective cell program regions.

10. The storage device of claim 9 , wherein the page of the plurality of memory cells is either a least significant bit page or a most significant bit page.

11. The storage device of claim 8 , wherein the at least one binary adder comprises a first binary adder and a second binary adder, each binary adder being configured to be enabled by a data enable signal, and wherein the determining the count of cells within each cell program region of the number of cell program regions comprises:

providing a data enable signal and a page indicator to the first binary adder and the second binary adder, the page indicator indicating a page of the plurality of memory cells for which the memory read operation was performed, the data enable signal being inverted for the second binary adder so that one adder is selected at any one time depending on the value of the data enable signal, wherein the value of the data enable signal is predetermined for each of the provided respective cell program regions.

12. A hardware-implemented method for improving error correction in a non-volatile memory storage device, comprising:

receiving, based on a memory read operation performed on a plurality of memory cells, initial values of the plurality of memory cells;

receiving a value indicating a number of cell program regions associated with the memory read operation;

receiving respective values, each of the respective values indicating a particular cell program region assigned to each memory cell of the plurality of memory cells;

determining a count of cells within each cell program region of the number of cell program regions based on the received initial values and the particular cell program region assigned to each memory cell;

generating respective confidence values for respective cell program regions based on the determined counts and the number of cell program regions, a confidence value being representative of a likelihood that a memory cell in a respective cell program region was programmed to a corresponding initial value of the received initial values; and

associating each generated confidence value with respective memory cells assigned to the respective program region,

wherein a cell program region of the cell program regions is between two read levels associated with the memory read operation.

13. The hardware-implemented method of claim 12 , the method further comprising:

generating a representative confidence value or sign value based on a function of the generated confidence values;

determining whether the generated representative confidence value or sign value satisfies a predetermined threshold;

adjusting, in response to the predetermined threshold being met, a read level offset used by the memory read operation for use in a future memory read operation; and

determining a respective read level for the future memory read operation based on varying a first read level by the adjusted offset associated with a respective region.

14. The hardware-implemented method of claim 13 , wherein generating the representative confidence value or sign value based on a function of the generated confidence values comprises:

providing, to a hardware accumulator, the generated respective confidence values for the respective cell program regions,

wherein the hardware accumulator generates a sum and a count of the generated confidence values,

wherein the representative confidence value or sign value is generated based on a function of the sum and the count generated by the accumulator.

15. The hardware-implemented method of claim 14 , wherein generating the representative confidence value or sign value based on a function of the generated confidence values further comprises:

providing the determined counts to the accumulator with the generated respective confidence values for the respective cell program regions,

wherein the hardware accumulator generates the sum and the count of the generated confidence values based on the generated respective confidence values and the determined counts.

16. The hardware-implemented method of claim 13 , the method further comprising:

adjusting, in response to the predetermined threshold being met, an amount of a variance in the read level offset based on the generated representative confidence value or sign value.

17. The hardware-implemented method of claim 12 , wherein generating the confidence values for the respective cell program regions based on the determined counts comprises determining an area under respective distribution curves of memory cells for respective cell program regions.

18. The hardware-implemented method of claim 12 , the method further comprising:

receiving the initial values of the plurality of memory cells with a first error indicator in connection with a first reading of the plurality of memory cells; and

in response to the first error indicator, initiating multiple subsequent reads of the plurality of memory cells at one or more different read levels to categorize the plurality of memory cells into the respective cell program regions, wherein the number of cell program regions associated with the memory read operation and the respective cell program regions assigned to each of the plurality of memory cells are received based on the multiple subsequent reads.

19. The hardware-implemented method of claim 12 , wherein determining the count of cells within each cell program region of the number of cell program regions comprises:

providing the respective cell program regions to at least one binary adder,

tallying, using the at least one binary adder, for each region of the provided respective cell program regions, a respective number of times a value for the region is equivalent to a binary zero and the number of times the value for the region is equivalent to a binary one.

20. A soft information module hardware device, comprising:

means for receiving, based on a memory read operation performed on a plurality of memory cells, initial values of the plurality of memory cells;

means for receiving a value indicating a number of cell program regions associated with the memory read operation;

means for receiving respective values, each of the respective values indicating a particular cell program region assigned to each memory cell of the plurality of memory cells;

means for determining a count of cells within each cell program region of the number of cell program regions based on the received initial values and the particular cell program region assigned to each memory cell;

means for generating respective confidence values for respective cell program regions based on the determined counts and the number of cell program regions, a confidence value being representative of a likelihood that a memory cell in a respective cell program region was programmed to a corresponding initial value of the received initial values; and

means for associating each generated confidence value with respective memory cells assigned to the respective program region,

wherein a cell program region of the cell program regions is between two read levels associated with the memory read operation.

Assignments (12)
SECURITY AGREEMENT (SUPPLEMENTAL) Recorded Nov 14, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 069411/0208 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2024
From: SANDISK TECHNOLOGIES, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 069168/0273 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 10, 2019
From: WEATHERS, ANTHONY D.; BARNDT, RICHARD D.; HU, XINDE
To: STEC, INC.
Reel/Frame 050331/0651 →
CHANGE OF NAME Recorded Sep 10, 2019
From: STEC, INC.
To: HGST TECHNOLOGIES SANTA ANA, INC.
Reel/Frame 050335/0204 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 16, 2018
From: HGST TECHNOLOGIES SANTA ANA, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 046174/0446 →
Continuity (4)
Continuation 14853941 · Sep 14, 2015
Continuation 13843225 · Mar 15, 2013
Provisional Application 61639040 · Apr 26, 2012
Related Publication 20180151222A1 · May 31, 2018
Cited By (1)
US 12,530,141