Method for manufacturing a semiconductor device assembly with through-mold cooling channel formed in encapsulant
View Patent ↗Semiconductor device assemblies having stacked semiconductor dies and thermal transfer devices that include vapor chambers are disclosed herein. In one embodiment, a semiconductor device assembly includes a first semiconductor die having a base region, at least one second semiconductor die at the base region, and a thermal transfer device attached to the first and second dies. The thermal transfer device includes an encapsulant at least partially surrounding the second die and a via formed in the encapsulant. The encapsulant at least partially defines a cooling channel that is adjacent to a peripheral region of the first die. The via includes a working fluid and/or a solid thermal conductor that at least partially fills the channel.
1. A method for manufacturing a semiconductor device assembly, comprising:
at least partially encapsulating a stack of semiconductor dies in an encapsulant that includes an upper surface, wherein the stack of semiconductor dies includes a plurality of semiconductor dies having a first die and a stack of second dies on the first die; and
forming a via in the encapsulant, wherein forming the via includes—
forming a cavity in the encapsulant, wherein the cavity extends past at least a portion of the stack of second dies from the upper surface of the encapsulant toward the first die and is disposed above a peripheral region of the first die, and
depositing a thermal conductor at least in the cavity, wherein the thermal conductor includes a solid fill material.
2. The method of claim 1 wherein the solid fill material includes a metal core.
3. The method of claim 1 wherein:
forming the via further includes depositing an interface material over the peripheral region of the first die through the cavity; and
depositing the thermal conductor includes depositing the solid fill material in the cavity after depositing the interface material.
4. The method of claim 1 , further comprising forming a dielectric spacer at a base of the cavity, wherein the dielectric spacer is between the thermal conductor and the peripheral region of the first die.
5. The method of claim 4 wherein the dielectric spacer comprises a portion of the encapsulant.
6. The method of claim 1 , further comprising positioning a heat dissipator over an opening of the cavity and attaching the heat dissipator to the encapsulant.
7. The method of claim 1 wherein forming the via in the encapsulant further includes soldering the solid fill material to a surface of the peripheral region within the cavity.
8. The method of claim 1 wherein the forming the cavity include forming a channel in a package casing, wherein the package casing at least partially surrounds the stack of semiconductor dies.
9. The method of claim 1 , further comprising:
forming the encapsulant over a semiconductor wafer; and
forming a plurality of channels in the encapsulant, wherein one of the channels include the cavity.
10. The method of claim 1 , further comprising:
forming the encapsulant over a plurality of stacks of semiconductor dies arranged in an array; and
forming a plurality of channels in the encapsulant, wherein one of the channels include the cavity.
11. A method for manufacturing a semiconductor device assembly, comprising:
at least partially encapsulating a first semiconductor die and a second semiconductor die in an encapsulant;
forming a cavity in the encapsulant, the cavity disposed above a peripheral region of the first semiconductor die; and
at least partially filling the cavity with a working fluid such that the working fluid directly contacts a thermally conductive feature at the peripheral region of the first semiconductor die, wherein the thermally conductive feature at the peripheral region of the first semiconductor die includes a thermally conductive liner between the peripheral region of the first semiconductor die and the working fluid.