IP Library Granted Patent US 10,340,249
Granted Patent B1
US 10,340,249 · App. 16/017,299 · Granted Jul 2, 2019

Semiconductor device and method

Inventors: Chen-Hua Yu (Hsinchu, TW); Kuo-Chung Yee (Taoyuan, TW); Chun Hui Yu (Zhubei, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H01L24/83H01L21/486H01L21/4857H01L21/561H01L23/481H01L24/33H01L24/81H01L25/0657H01L2224/3303H01L2224/83201H01L2224/83815
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Quick Facts
Patent No.
US 10,340,249
App. No.
16/017,299
Granted
Jul 2, 2019
Kind
B1
Abstract

In an embodiment, a device includes: a first device including: an integrated circuit device having a first connector; a first photosensitive adhesive layer on the integrated circuit device; and a first conductive layer on the first connector, the first photosensitive adhesive layer surrounding the first conductive layer; a second device including: an interposer having a second connector; a second photosensitive adhesive layer on the interposer, the second photosensitive adhesive layer physically connected to the first photosensitive adhesive layer; and a second conductive layer on the second connector, the second photosensitive adhesive layer surrounding the second conductive layer; and a conductive connector bonding the first and second conductive layers, the conductive connector surrounded by an air gap.

Claims (63)

1. A method comprising:

forming a first opening in a first photosensitive adhesive layer, the first photosensitive adhesive layer being adjacent a first side of a first integrated circuit device;

plating a first reflowable layer in the first opening;

forming a second opening in a second photosensitive adhesive layer, the second photosensitive adhesive layer being adjacent a first side of a second integrated circuit device;

plating a second reflowable layer in the second opening;

pressing the first and second photosensitive adhesive layers together, thereby physically connecting the first and second integrated circuit devices; and

reflowing the first and second reflowable layers, thereby forming a conductive connector electrically connecting the first and second integrated circuit devices.

2. The method of claim 1 , further comprising:

encapsulating the first integrated circuit device with a molding compound, the molding compound being adjacent the first side of the second integrated circuit device;

singulating the first integrated circuit device;

forming a redistribution structure adjacent a second side of the second integrated circuit device; and

forming conductive balls on the redistribution structure.

3. The method of claim 2 , further comprising:

bonding the second integrated circuit device to a package substrate using the conductive balls.

4. The method of claim 1 , further comprising:

forming a third opening in a third photosensitive adhesive layer, the third photosensitive adhesive layer being adjacent a second side of the first integrated circuit device;

plating a third reflowable layer in the third opening; and

physically connecting a third integrated circuit device to the first integrated circuit device using the third photosensitive adhesive layer and the third reflowable layer.

5. The method of claim 1 , further comprising:

forming first vias on the first side of the second integrated circuit device;

forming a redistribution structure adjacent a second side of the second integrated circuit device, the redistribution structure electrically connected to the first vias;

forming conductive connectors on the redistribution structure; and

singulating the first integrated circuit device and the redistribution structure.

6. The method of claim 5 , further comprising:

forming second vias adjacent the first and second integrated circuit devices; and

encapsulating the first vias and the second vias with a molding compound.

7. The method of claim 1 , wherein after reflowing the first reflowable layer, the conductive connector is surrounded by an air gap.

8. A method comprising:

encapsulating a plurality of first integrated circuit devices with a first molding compound;

forming a first photosensitive adhesive layer over the first integrated circuit devices;

patterning a first opening in the first photosensitive adhesive layer;

plating a first conductive layer in the first opening;

plating a first reflowable layer on the first conductive layer, a combined thickness of the first conductive layer and the first reflowable layer being less than a first thickness of the first photosensitive adhesive layer, the first conductive layer and the first reflowable layer electrically connected to the first integrated circuit devices;

pressing a second integrated circuit device to the first photosensitive adhesive layer to physically connect the first and second integrated circuit devices; and

reflowing the first reflowable layer to form a conductive connector electrically connecting the first and second integrated circuit devices.

9. The method of claim 8 , further comprising:

forming a first redistribution structure over the first integrated circuit devices, the first photosensitive adhesive layer being a topmost layer of the first redistribution structure, the second integrated circuit device bonded to the first redistribution structure after reflowing the first reflowable layer.

10. The method of claim 9 , further comprising:

placing the first integrated circuit devices on a second redistribution structure.

11. The method of claim 10 , further comprising:

forming vias extending through the first molding compound, the vias electrically connecting the first and second redistribution structures.

12. The method of claim 8 , further comprising:

encapsulating the second integrated circuit device with a second molding compound; and

forming a first redistribution structure over the second integrated circuit device and the second molding compound.

13. The method of claim 12 , further comprising:

forming vias extending through the second molding compound, the vias electrically connecting the first redistribution structure and the first integrated circuit devices.

14. The method of claim 8 , wherein after reflowing the first reflowable layer, the conductive connector is surrounded by an air gap.

15. A method comprising:

forming a first photosensitive adhesive layer on an integrated circuit device;

patterning a first opening in the first photosensitive adhesive layer, the first opening exposing a first connector of the integrated circuit device;

plating a first conductive layer in the first opening on the first connector;

plating a first reflowable layer in the first opening on the first conductive layer, a first combined thickness of the first conductive layer and the first reflowable layer being less than a first thickness of the first photosensitive adhesive layer;

forming a second photosensitive adhesive layer on an interposer;

patterning a second opening in the second photosensitive adhesive layer, the second opening exposing a second connector of the interposer;

plating a second conductive layer in the second opening on the second connector;

plating a second reflowable layer in the second opening on the second conductive layer, a second combined thickness of the second conductive layer and the second reflowable layer being different from a second thickness of the second photosensitive adhesive layer;

pressing the first and second photosensitive adhesive layers together to physically couple the integrated circuit device and the interposer; and

reflowing the first and second reflowable layers to form a conductive connector electrically coupling the integrated circuit device and the interposer.

16. The method of claim 15 , wherein the second combined thickness is greater than the second thickness of the second photosensitive adhesive layer.

17. The method of claim 15 , wherein the second combined thickness is less than the second thickness of the second photosensitive adhesive layer.

18. The method of claim 15 , wherein after reflowing the first and second reflowable layers, the conductive connector is surrounded by an air gap.

19. The method of claim 18 , wherein a height of the air gap is less than the first combined thickness and the second combined thickness.

20. The method of claim 15 , wherein a first width of the first opening is different from a second width of the second opening.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2018
From: YU, CHEN-HUA; YEE, KUO-CHUNG; YU, CHUN HUI
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 046580/0765 →
Cited By (19)
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