IP Library Granted Patent US 10,608,647
Granted Patent B1
US 10,608,647 · App. 16/221,188 · Granted Mar 31, 2020

Delay adjustment using frequency estimation

Inventors: Harihara Subramanian Ranganathan (Round Rock, TX); Vivek Sarda (Austin, TX)
Assignee: Silicon Laboratories Inc.
H03L7/0814H03L7/085H03L7/0992H03L7/10H03L7/148H03L7/1972
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Quick Facts
Patent No.
US 10,608,647
App. No.
16/221,188
Granted
Mar 31, 2020
Kind
B1
Abstract

A method includes generating first frequency metrics for a first received network clock signal using a local reference clock signal. The method includes, in response to the first received network clock signal being available and satisfying a quality metric, generating a network delay estimate using a first error estimate based on the first received network clock signal, and updating stored frequency metrics for the first received network clock signal with the first frequency metrics. The method includes generating an output clock signal based on received packets and the network delay estimate. The first frequency metrics for the first received network clock signal may include a current average frequency count, a prior average frequency count, a standard deviation of prior average frequency counts and a multiplicative constant corresponding to a number of samples used to determine the current average frequency count, prior average frequency count, and standard deviation.

Claims (31)

1. A method comprising:

generating first frequency metrics for a first received network clock signal using a local reference clock signal;

in response to the first received network clock signal being available and satisfying a quality metric, generating a network delay estimate using a first error estimate based on the first received network clock signal, and updating stored frequency metrics for the first received network clock signal with the first frequency metrics; and

generating an output clock signal based on received packets and the network delay estimate.

2. The method, as recited in claim 1 , wherein the first received network clock signal is a Global Positioning System (GPS) clock signal.

3. The method, as recited in claim 1 , wherein the first frequency metrics include a current average frequency count, a prior average frequency count, a standard deviation of prior average frequency counts, and a multiplicative constant corresponding to a number of samples used to determine the current average frequency count, prior average frequency count, and standard deviation.

4. The method, as recited in claim 1 , wherein availability of the first received network clock signal is determined based on the first frequency metrics, second frequency metrics for a second received network clock signal, and third frequency metrics for a second local clock signal.

5. The method, as recited in claim 4 , wherein the second received network clock signal is a synchronous Ethernet clock signal.

6. The method, as recited in claim 4 , further comprising:

generating the network delay estimate using a second error estimate based on the second frequency metrics in response to the first received network clock signal being unavailable, the second received network clock signal satisfying a second quality metric, and the first error estimate being greater than the second error estimate.

7. The method, as recited in claim 1 , further comprising:

generating the first error estimate based on a difference in a forward network packet delay and a backward network packet delay using the first received network clock signal.

8. The method, as recited in claim 1 , wherein the network delay estimate is based on precision time protocol timestamps in precision timing protocol packets received over a network.

9. The method, as recited in claim 1 , wherein the first received network clock signal is indicated as unavailable in response to a first average frequency deviation of the first received network clock signal being greater than a second average frequency deviation of a second received network clock signal.

10. The method, as recited in claim 1 , wherein the first received network clock signal is indicated as unavailable in response to a first average frequency deviation of the first received network clock signal being equal to a second average frequency deviation of a second received network clock signal and greater than a third average frequency deviation of a second local clock signal.

11. A clock product comprising:

a frequency estimator configured to use a local clock signal as a reference clock signal to generate first frequency metrics for a first received network clock signal, second frequency metrics for a second received network clock signal, and third frequency metrics for a second local clock signal; and

a control circuit configured to generate a network delay estimate using a first error estimate based on the first received network clock signal and to update stored frequency metrics for the first received network clock signal with the first frequency metrics, in response to the first received network clock signal being available and satisfying a quality metric,

wherein the clock product is configured to provide an output clock signal based on received packets and the network delay estimate.

12. The clock product, as recited in claim 11 , wherein the first received network clock signal is a Global Positioning System (GPS) clock signal.

13. The clock product, as recited in claim 11 , wherein the first frequency metrics include a current average frequency count, a prior average frequency count, a standard deviation of prior average frequency counts, and a multiplicative constant corresponding to a number of samples used to determine the current average frequency count, prior average frequency count, and standard deviation.

14. The clock product, as recited in claim 11 , wherein the control circuit determines availability of the first received network clock signal based on the first frequency metrics, the second frequency metrics and the third frequency metrics.

15. The clock product, as recited in claim 11 , wherein the second received network clock signal is a synchronous Ethernet clock signal.

16. The clock product, as recited in claim 11 , wherein the control circuit is configured to generate the network delay estimate using a second error estimate based on the second frequency metrics in response to the first received network clock signal being unavailable, the second received network clock signal satisfying a second quality metric, and the first error estimate being greater than the second error estimate.

17. The clock product, as recited in claim 11 , wherein the frequency estimator is configured to generate the first error estimate based on a difference in a forward network packet delay and a backward network packet delay using the first received network clock signal.

18. The clock product, as recited in claim 11 , wherein the network delay estimate is generated based on precision time protocol timestamps in precision timing protocol packets received over a network.

19. The clock product, as recited in claim 11 , wherein the first received network clock signal is indicated as unavailable in response to a first average frequency deviation of the first received network clock signal being greater than a second average frequency deviation of the second received network clock signal.

20. An apparatus comprising:

means for generating first frequency metrics for a first received network clock signal using a local reference clock signal;

means for generating a network delay estimate using a first error estimate based on the first received network clock signal, and updating stored frequency metrics for the first received network clock signal with the first frequency metrics in response to the first received network clock signal being available and satisfying a quality metric; and

means for generating an output clock signal based on received packets and the network delay estimate.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 29, 2021
From: SILICON LABORATORIES INC.
To: SKYWORKS SOLUTIONS, INC.
Reel/Frame 057033/0579 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2018
From: RANGANATHAN, HARIHARA SUBRAMANIAN; SARDA, VIVEK
To: SILICON LABORATORIES INC.
Reel/Frame 047793/0690 →
Cited By (6)
US 12,192,079 US 12,216,489 US 12,323,334 US 12,425,041 US 12,500,822 US 12,519,477