IP Library › Granted Patent US 10,608,118
Granted Patent B2
US 10,608,118 · App. 16/272,287 · Granted Mar 31, 2020

Semiconductor device

Inventor: Shunpei Yamazaki (Setagaya, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/7869H01L21/02554H01L21/02565H01L21/02631H01L29/04H01L29/045H01L29/221H01L29/2206H01L29/24H01L29/263H01L29/42356H01L29/45H01L29/4908H01L29/66969H01L29/78693H01L29/78696
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Quick Facts
Patent No.
US 10,608,118
App. No.
16/272,287
Granted
Mar 31, 2020
Kind
B2
Abstract

An embodiment is a semiconductor device which includes a first oxide semiconductor layer over a substrate having an insulating surface and including a crystalline region formed by growth from a surface of the first oxide semiconductor layer toward an inside; a second oxide semiconductor layer over the first oxide semiconductor layer; a source electrode layer and a drain electrode layer which are in contact with the second oxide semiconductor layer; a gate insulating layer covering the second oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating layer and in a region overlapping with the second oxide semiconductor layer. The second oxide semiconductor layer is a layer including a crystal formed by growth from the crystalline region.

Claims (28)

1. A transistor comprising:

a gate electrode; and

an oxide semiconductor layer including a region overlapping with the gate electrode with a gate insulating film therebetween,

wherein the gate electrode is over the oxide semiconductor layer,

wherein the oxide semiconductor layer comprises a first layer comprising two-component metal oxides comprising In and Zn, and a second layer comprising a channel formation region adjacent to the first layer, and

wherein the oxide semiconductor layer comprises a crystalline region whose c-axis is aligned in a direction perpendicular or substantially perpendicular to a surface of the oxide semiconductor layer.

2. The transistor according to claim 1 , wherein the second layer comprises a three-component metal oxide including indium, gallium, and zinc.

3. A transistor comprising:

a gate electrode; and

an oxide semiconductor layer including a region overlapping with the gate electrode with a gate insulating film therebetween,

wherein the gate electrode is over the oxide semiconductor layer,

wherein the oxide semiconductor layer comprises a first layer comprising two-component metal oxides comprising In and Zn, and a second layer comprising a channel formation region adjacent to the first layer, and

wherein the oxide semiconductor layer comprises a c-axis-aligned crystalline region.

4. The transistor according to claim 3 , wherein the second layer comprises a three-component metal oxide including indium, gallium, and zinc.

5. A transistor comprising:

a gate electrode; and

an oxide semiconductor layer including a region overlapping with the gate electrode with a gate insulating film therebetween,

wherein the gate electrode is below the oxide semiconductor layer,

wherein the oxide semiconductor layer comprises a first layer comprising two-component metal oxides comprising In and Zn, and a second layer comprising a channel formation region adjacent to the first layer, and

wherein the oxide semiconductor layer comprises a crystalline region whose c-axis is aligned in a direction perpendicular or substantially perpendicular to a surface of the oxide semiconductor layer.

6. The transistor according to claim 5 , wherein the second layer comprises a three-component metal oxide including indium, gallium, and zinc.

7. A transistor comprising:

a gate electrode; and

an oxide semiconductor layer including a region overlapping with the gate electrode with a gate insulating film therebetween,

wherein the gate electrode is below the oxide semiconductor layer,

wherein the oxide semiconductor layer comprises a first layer comprising two-component metal oxides comprising In and Zn, and a second layer comprising a channel formation region adjacent to the first layer, and

wherein the oxide semiconductor layer comprises a c-axis-aligned crystalline region.

8. The transistor according to claim 7 , wherein the second layer comprises a three-component metal oxide including indium, gallium, and zinc.

Priority Claims (1)
JP 2009-270857 · Nov 28, 2009 · national
Continuity (6)
Continuation 15882139 · Jan 29, 2018
Continuation 14964950 · Dec 10, 2015
Continuation 14330597 · Jul 14, 2014
Continuation 13684290 · Nov 23, 2012
Continuation 12951249 · Nov 22, 2010
Related Publication 20190172952A1 · Jun 6, 2019
Cited By (6)
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