Devices having a semiconductor material that is semimetal in bulk and methods of forming the same
Devices, and methods of forming such devices, having a material that is semimetal when in bulk but is a semiconductor in the devices are described. An example structure includes a substrate, a first source/drain contact region, a channel structure, a gate dielectric, a gate electrode, and a second source/drain contact region. The substrate has an upper surface. The channel structure is connected to and over the first source/drain contact region, and the channel structure is over the upper surface of the substrate. The channel structure has a sidewall that extends above the first source/drain contact region. The channel structure comprises a bismuth-containing semiconductor material. The gate dielectric is along the sidewall of the channel structure. The gate electrode is along the gate dielectric. The second source/drain contact region is connected to and over the channel structure.
1. A method comprising:
forming an isolation region in a substrate, wherein the isolation region is between a first and second region of the substrate;
epitaxially growing a first doped region in the first region of the substrate and epitaxially growing a first doped source/drain contact region on the first doped region;
epitaxially growing a second doped region in the second region of the substrate and epitaxially growing a second doped source/drain contact region on the second doped region;
forming a first gate electrode over the first doped source/drain contact region;
forming a second gate electrode over the second doped source/drain contact region;
forming a first opening through the first gate electrode and to the first doped source/drain contact region;
forming a second opening through the second gate electrode and to the second doped source/drain contact region;
depositing a first bismuth-containing semiconductor material in the first opening to form a first bismuth-containing channel structure, the first bismuth-containing channel structure being connected to the first doped source/drain contact region;
depositing a second bismuth-containing semiconductor material in the second opening to form a second bismuth-containing channel structure, the second bismuth-containing channel structure being connected to the second doped source/drain contact region; and
crystallizing the first and second bismuth-containing semiconductor materials, the crystallizing comprising performing an anneal.
2. The method of claim 1 , wherein the anneal is performed at a temperature of below about 300° C.
3. The method of claim 1 , wherein the anneal is performed for a duration in a range from about 0.01 seconds to about 300 seconds.
4. The method of claim 1 , wherein epitaxially growing the first doped region comprises in situ doping with boron.
5. The method of claim 4 , wherein the boron in the first doped region has a concentration in a range from about 1×10 16 cm −3 to about 1×10 18 cm −3 .
6. The method of claim 1 , wherein epitaxially growing the first doped source/drain contact region comprises in situ doping with phosphorus.
7. The method of claim 6 , wherein the phosphorus in the first doped region has a concentration in a range from about 1×10 20 cm −3 to about 1×10 21 cm −3 .
8. The method of claim 1 , wherein the first doped region and the first doped source/drain contact region are epitaxially grown using Metal-Organic Chemical Vapor Deposition.
9. A method comprising:
forming an isolation region in a substrate, wherein the isolation region extends above an upper surface of the substrate;
epitaxially growing a first epitaxial layer adjacent a first sidewall of the isolation region, the first epitaxial layer being doped with a first dopant, the first dopant being a first type;
epitaxially growing a second epitaxial layer over the first epitaxial layer, the second epitaxial layer being doped with a second dopant, the second dopant being a second type opposite the first type;
epitaxially growing a third epitaxial layer adjacent a second sidewall of the isolation region, the second sidewall being opposite the first sidewall, the third epitaxial layer being doped with the second dopant;
epitaxially growing a fourth epitaxial layer over the second epitaxial layer, the fourth epitaxial layer being doped with the first dopant;
forming a conductive layer over the second epitaxial layer;
forming a first opening through a first portion of the conductive layer to the second epitaxial layer;
forming a second opening through a second portion of the conductive layer to the fourth epitaxial layer;
forming a bismuth-containing material in the first opening and the second opening; and
crystallizing the bismuth-containing material with an anneal.
10. The method of claim 9 , wherein the bismuth-containing material comprises an n-type dopant.
11. The method of claim 10 , wherein the n-type dopant is tellurium.
12. The method of claim 9 , wherein the forming the bismuth-containing material comprises a deposition by Atomic Layer Deposition.
13. The method of claim 12 , wherein the deposition uses Bis(acetate-O)triphenylbismuth(V) ((CH 3 CO 2 ) 2 Bi(C 6 H 5 ) 3 ), Triphenylbismuth (Bi(C 6 H 5 ) 3 ), or Tris(2-methoxyphenyl)bismuthine ((CH 3 OC 6 H 4 ) 3 Bi).
14. The method of claim 9 , wherein the bismuth-containing material comprises a p-type dopant.
15. The method of claim 14 , wherein the p-type dopant is tin.
16. A method comprising:
forming an isolation region in a substrate between a first region and a second region of the substrate;
recessing the substrate in the first region and the second region;
epitaxially growing a first doped region in the first region;
epitaxially growing a first highly doped source/drain contact region on the first doped region;
epitaxially growing a second doped region in the second region;
epitaxially growing a second highly doped source/drain contact region on the second doped region;
forming a conductive layer over the first and second highly doped source/drain contact regions;
forming a first opening through a first portion of the conductive layer to the first highly doped source/drain contact region and forming a second opening through a second portion of the conductive layer to the second highly doped source/drain contact region;
forming a first gate dielectric along sidewalls of the first opening and forming a second gate dielectric along sidewalls of the second opening;
forming a bismuth-containing material in the first opening and the second opening; and
crystallizing the bismuth-containing material by annealing.
17. The method of claim 16 , further comprising forming the first gate dielectric so that a width measured between opposing inner sidewalls of the first gate dielectric is 53 nm or less.
18. The method of claim 16 , wherein crystallizing the bismuth-containing material by annealing is performed at a temperature of about 275° C.
19. The method of claim 16 , wherein the bismuth-containing material is doped in situ with tellurium.
20. The method of claim 19 , wherein the tellurium is in situ doped using TeBr 4 .