IP Library Granted Patent US 11,416,175
Granted Patent B2
US 11,416,175 · App. 16/903,277 · Granted Aug 16, 2022

Multiple sets of trim parameters

Inventors: Tomer Tzvi Eliash (Kfar Saba, IL); Asaf Gueta (Or Yehuda, IL); Inon Cohen (Oranit, IL); Yuval Grossman (Kiryat Ono, IL)
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
G06F3/0659G06F3/0604G06F3/0679G06F13/1668
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,416,175
App. No.
16/903,277
Granted
Aug 16, 2022
Kind
B2
Abstract

Apparatus, methods, media and systems for multiple sets of trim parameters are described. A non-volatile memory device may comprise a first register, a second register, a multiplexer, a first set of I/O lines, each coupled to the first register and the multiplexer, each associated with a particular trim set among multiple trim sets stored in the first register, one or more second I/O lines, each coupled to the second register and the multiplexer. The multiplexer is configured to receive a control signal. The multiplexer is configured to output, based on the control signal, a particular trim set among the multiple trim sets to the second register using the one or more second I/O lines.

Claims (56)

1. A data storage system, comprising:

a first non-volatile memory device, comprising:

a first register configured to store a plurality of trim sets;

a second register;

a multiplexer coupled between the first register and the second register; and

a plurality of input/output lines coupled between the first register and the multiplexer;

a controller positioned outside the first non-volatile memory device, wherein the controller is configured to cause:

when an operating condition of the first non-volatile memory device is changed, transferring one or more first control signals to cause one or more first trim sets of the plurality of trim sets to be transferred from the first register to the second register to allow the one or more first trim sets to be used by the first non-volatile memory device,

wherein:

the first register comprises a first portion, a second portion, and a third portion;

the plurality of input/output lines comprises a first line, a second line, and a third line;

the plurality of trim sets comprises a first trim set, a second trim set, and a third trim set;

the first portion is associated with the first line and is configured to store the first trim set;

the second portion is associated with the second line and is configured to store the second trim set;

the third portion is associated with the third line and is configured to store the third trim set;

the multiplexer is configured with an order configuration, ordering the first trim set as first in order to be transferred from the first register to the second register, the second trim set as second in order to be transferred from the first register to the second register, and the third trim set as third in order to be transferred from the first register to the second register;

when the multiplexer selects the second line and the third line, the multiplexer is configured, according to the order configuration, to transfer the second trim set from the second portion of the first register to the second register and then to transfer the third trim set from the third portion of the first register to the second register after the second trim set is transferred.

2. The data storage system of claim 1 , wherein the operating condition is for changing based on temperature data of the first non-volatile memory device.

3. The data storage system of claim 1 , wherein the controller is configured to cause selecting the second line and the third line of the plurality of input/output lines.

4. The data storage system of claim 1 , wherein the controller is configured to cause:

determining whether an operating condition of a second non-volatile memory device is changed;

in response to determining that the operating condition of the second non-volatile memory device is changed:

identifying one or more second trim sets calibrated for the second non-volatile memory device and associated with the changed operating condition of the second non-volatile memory device; and

transferring one or more control signals for the one or more second trim sets to the second non-volatile memory device, causing the one or more second trim sets to be used by the second non-volatile memory device.

5. The data storage system of claim 4 , wherein the one or more second trim sets are different from the one or more first trim sets, and

wherein the first non-volatile memory device is a first die, and the second non-volatile memory device is a second die different from the first die.

6. The data storage system of claim 4 , wherein the one or more second trim sets are for being calibrated based on a manufacturing variance of the second non-volatile memory device.

7. The data storage system of claim 1 , wherein the data storage system is configured to have the one or more first trim sets that are calibrated based on a manufacturing variance of the first non-volatile memory device.

8. The data storage system of claim 1 , wherein data in each trim set of the one or more first trim sets is associated with an operating condition of the first non-volatile memory device.

9. The data storage system of claim 1 , wherein the controller is configured to generate the one or more first control signals based on a set of rules and the operating condition of the first non-volatile memory device.

10. The data storage system of claim 1 , wherein:

the second trim set comprises a first trim parameter having a first value;

the third trim set comprises the first trim parameter having a second value;

the second value is different from the first value.

11. The data storage system of claim 1 , wherein the controller is configured to cause:

selecting one or more second control signals based on one or more inputs from a host device positioned outside the data storage system; and

transferring the one or more inputs to the multiplexer to cause one or more additional trim sets to be loaded into the second register and to cause modification of an operating behavior or a configuration of the first non-volatile memory device.

12. A computer-implemented method, comprising:

when an operating condition of a first non-volatile memory device is changed, causing transfer of one or more first control signals to cause one or more first trim sets to be transferred from a first register to a second register to allow the one or more first trim sets to be used by the first non-volatile memory device;

configuring a multiplexer of the first non-volatile memory device with an order configuration, ordering a first trim set as first in order to be transferred from the first register to the second register, a second trim set as second in order to be transferred from the first register to the second register, and a third trim set as third in order to be transferred from the first register to the second register;

selecting a second line associated with the second trim set and a third line associated with the third trim set;

transferring, according to the order configuration, the second trim set the first register to the second register and then the third trim set from the first register to the second register after the second trim set is transferred.

13. The computer-implemented method of claim 12 , wherein the operating condition is changed based on temperature data of the first non-volatile memory device.

14. The computer-implemented method of claim 12 , comprising:

determining whether an operating condition of a second non-volatile memory device is changed; and

in response to determining that the operating condition of the second non-volatile memory device is changed:

identifying one or more second trim sets calibrated for the second non-volatile memory device and associated with the changed operating condition of the second non-volatile memory device; and

transferring one or more control signals for the one or more second trim sets to the second non-volatile memory device, causing the one or more second trim sets to be used by the second non-volatile memory device.

15. The computer-implemented method of claim 14 , wherein the one or more second trim sets are different from the one or more first trim sets.

16. The computer-implemented method of claim 12 , wherein the one or more first trim sets are calibrated based on a manufacturing variance of the first non-volatile memory device.

17. An apparatus, comprising:

means for, when an operating condition of a first non-volatile memory device is changed, causing transfer of one or more first control signals to cause one or more first trim sets to be transferred from a first register to a second register to allow the one or more first trim sets to be used by the first non-volatile memory device;

means for configuring a multiplexer of the first non-volatile memory device with an order configuration, ordering a first trim set as first in order to be transferred from the first register to the second register, a second trim set as second in order to be transferred from the first register to the second register, and a third trim set as third in order to be transferred from the first register to the second register;

means for selecting a second line associated with the second trim set and a third line associated with the third trim set;

means for transferring, according to the order configuration, the second trim set the first register to the second register and then the third trim set from the first register to the second register after the second trim set is transferred.

18. The apparatus of claim 17 , wherein the operating condition is for changing based on temperature data of the first non-volatile memory device.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 053926 FRAME 0446 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058966/0321 →
SECURITY INTEREST Recorded Sep 29, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 053926/0446 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 24, 2020
From: ELIASH, TOMER TZVI; GUETA, ASAF; COHEN, INON; GROSSMAN, YUVAL
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 053311/0068 →
Continuity (2)
Continuation 15986744 · May 22, 2018
Related Publication 20200310696A1 · Oct 1, 2020