IP Library Granted Patent US 11,581,190
Granted Patent B2
US 11,581,190 · App. 17/087,185 · Granted Feb 14, 2023

Method of fabricating semiconductor fins by differentially oxidizing mandrel sidewalls

Inventor: Kangguo Cheng (Schenectady, NY)
Assignee: TESSERA LLC
H01L21/3088H01L21/0337H01L21/26506H01L21/3065H01L21/3081H01L21/3085H01L21/3086H01L21/31138H01L21/32105H01L21/426H01L21/823468H01L21/823821H01L27/0924H01L27/1211H01L29/66H01L29/66795H01L29/66818H01L29/786H01L29/7851H01L27/1104
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Quick Facts
Patent No.
US 11,581,190
App. No.
17/087,185
Granted
Feb 14, 2023
Kind
B2
Abstract

A method of fabricating semiconductor fins, including, patterning a film stack to produce one or more sacrificial mandrels having sidewalls, exposing the sidewall on one side of the one or more sacrificial mandrels to an ion beam to make the exposed sidewall more susceptible to oxidation, oxidizing the opposite sidewalls of the one or more sacrificial mandrels to form a plurality of oxide pillars, removing the one or more sacrificial mandrels, forming spacers on opposite sides of each of the plurality of oxide pillars to produce a spacer pattern, removing the plurality of oxide pillars, and transferring the spacer pattern to the substrate to produce a plurality of fins.

Claims (42)

1. A method of fabricating semiconductor fins, comprising:

patterning a plurality of mandrels over a substrate, each mandrel of the plurality of mandrels having a first side opposite to a second side of the mandrel;

for each mandrel of the plurality of mandrels, forming a first oxide pillar of a first width at the first side of the mandrel and a second oxide pillar of a second width at the second side of the mandrel by differentially oxidizing the first and second sides of the mandrel such that the first width is greater than the second width;

removing the unoxidized portions of the plurality of mandrels, leaving alternating first and second oxide pillars having the first and second widths, respectively;

forming spacers on opposite sides of the first and second oxide pillars;

removing the first and second oxide pillars, leaving a spacer pattern; and

transferring the spacer pattern to the substrate to form a plurality of fins by etching the substrate to form trenches between the plurality of fins.

2. The method of claim 1 , wherein the mandrels comprise amorphous silicon.

3. The method of claim 1 , wherein the spacers comprise amorphous carbon.

4. The method of claim 1 , further comprising ion implanting one mandrel sidewall of each of the mandrels prior to forming sets of first and second oxide pillars on opposite sides of the mandrels.

5. The method of claim 4 , wherein the ion implanting implants a species comprising a p-type dopant.

6. The method of claim 1 , wherein the first oxide pillars are 5-30 nm wider than the second oxide pillars.

7. A method of forming an SRAM according to the method of claim 1 .

8. The method of claim 1 , wherein the fin pitch of a pair of fins corresponding to the spacers formed on the first oxide pillars is a non-integer multiple of the fin pitch of a pair of fins corresponding to the spacers formed on the second oxide pillars.

9. A method of fabricating semiconductor fins, comprising:

patterning a plurality of mandrels over a substrate, each of the mandrels having a top surface and a capping layer on the top surface;

ion implanting one of two sidewalls of the mandrels and the capping layer;

forming sets of first and second oxide pillars by differentially oxidizing implanted and unimplanted mandrel sidewalls;

removing the unoxidized portions of the mandrels, leaving first and second oxide pillars having first and second widths, respectively, wherein the first width is greater than the second width;

forming spacers on opposite sides of the first and second oxide pillars;

removing the first and second oxide pillars, leaving a spacer pattern; and

transferring the spacer pattern to the substrate to form a plurality of fins by etching the substrate to form trenches between the plurality of fins.

10. The method of claim 9 , wherein the mandrels comprise amorphous silicon.

11. The method of claim 9 , wherein the spacers comprise amorphous carbon.

12. The method of claim 9 , wherein the ion implantation implants a species comprising a p-type dopant.

13. The method of claim 9 , wherein the first oxide pillars are 5-30 nm wider than the second oxide pillars.

14. A method of forming an SRAM according to the method of claim 9 .

15. A method of fabricating semiconductor fins, comprising:

forming a capping layer over a mandrel layer above a substrate;

patterning the capping and mandrel layers together to form capped mandrels;

ion implanting a sidewall and a top surface of the capped mandrels, the capping layer of the capped mandrels limiting or blocking ion implantation into the mandrel layer of the capped mandrels;

forming sets of first and second oxide pillars on outer portions of the capped mandrels, the first and second sets of oxide pillars oxidizing differently based on whether the sidewall was ion implanted;

removing the capping layer;

removing the unoxidized portions of the capped mandrels, leaving first and second oxide pillars having first and second widths, respectively, wherein the first width is greater than the second width;

forming spacers on opposite sides of the first and second oxide pillars;

removing the first and second oxide pillars, leaving a spacer pattern; and

transferring the spacer pattern to the substrate to form a plurality of fins by etching the substrate to form trenches between the plurality of fins.

16. The method of claim 15 , wherein the capped mandrels comprise amorphous silicon.

17. The method of claim 15 , wherein the spacers comprise amorphous carbon.

18. The method of claim 15 , wherein the ion implanting implants a species comprising a p-type dopant.

19. The method of claim 15 , wherein the first oxide pillars are 5-30 nm wider than the second oxide pillars.

20. A method of forming an SRAM according to the method of claim 15 .

Assignments (5)
CHANGE OF NAME Recorded Sep 27, 2024
From: TESSERA LLC
To: ADEIA SEMICONDUCTOR SOLUTIONS LLC
Reel/Frame 069067/0454 →
SECURITY INTEREST Recorded May 3, 2023
From: ADEIA GUIDES INC.; ADEIA IMAGING LLC; ADEIA MEDIA HOLDINGS LLC; ADEIA MEDIA SOLUTIONS INC.; ADEIA SEMICONDUCTOR ADVANCED TECHNOLOGIES INC.; ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.; ADEIA SEMICONDUCTOR INC.; ADEIA SEMICONDUCTOR SOLUTIONS LLC; ADEIA SEMICONDUCTOR TECHNOLOGIES LLC; ADEIA SOLUTIONS LLC
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 063529/0272 →
CHANGE OF NAME Recorded Apr 29, 2022
From: TESSERA, INC.
To: TESSERA LLC
Reel/Frame 059835/0051 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2020
From: CHENG, KANGGUO
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 054245/0332 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2020
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: TESSERA, INC.
Reel/Frame 054245/0438 →
Continuity (4)
Continuation 16040093 · Jul 19, 2018
Continuation 15647689 · Jul 12, 2017
Continuation 15077538 · Mar 22, 2016
Related Publication 20210111032A1 · Apr 15, 2021
Cited By (2)
US 12,342,564 US 12,532,682