IP Library › Granted Patent US 12,532,546
Granted Patent B2
US 12,532,546 · App. 17/199,123 · Granted Jan 20, 2026

Methods for reduction of photoresist defect

Inventors: Chun-Wei Liao (Taoyuan, TW); Hui-Chun Lee (Hsinchu, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
H10D89/814G03F7/0035G03F7/2004G03F7/40
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Quick Facts
Patent No.
US 12,532,546
App. No.
17/199,123
Granted
Jan 20, 2026
Kind
B2
Abstract

The present disclosure in various embodiments provides a hardened resist layer that can reduce resist scum defects in a resist layer. In one embodiment, a lithography method is provided. The method includes forming a resist layer over a substrate, performing an exposure process on the resist layer, performing a developing process on the resist layer to form a patterned resist layer having a plurality resist segments, exposing the patterned resist layer to a vacuum ultraviolet (VUV) radiation, and subjecting the resist pattern to a de-scum process.

Claims (46)

1 . A lithography method, comprising:

forming a resist layer over a substrate;

performing an exposure process on the resist layer;

performing a developing process on the resist layer to form a patterned resist layer having a plurality resist segments and a resist scum protruding from sidewalls of the resist segments and extending between two adjacent resist segments, wherein the resist scum is exposed to an exposure light at the exposure process;

hardening the patterned resist layer including the resist scum by exposing the patterned resist layer to a vacuum ultraviolet (VUV) radiation, the hardening comprising:

exposing the patterned resist layer to a first vacuum ultraviolet (VUV) radiation having a first exposure energy;

exposing the patterned resist layer to a second VUV radiation having a second exposure energy that is different than the first exposure energy; and

after exposing the patterned resist layer to the VUV radiation, subjecting the resist pattern to a de-scum process that is substantially free of VUV radiation to remove the resist scum.

2 . The method of claim 1 , further comprising:

after exposing the patterned resist layer to VUV radiation, heating the patterned resist layer from a first temperature to a second temperature that is greater than the first temperature.

3 . The method of claim 1 , wherein the VUV radiation is emitted at an exposure energy directed to reduce a critical dimension of each resist segment.

4 . The method of claim 1 , wherein exposing the patterned resist layer to a VUV radiation is performed under vacuum condition.

5 . The method of claim 1 , wherein the de-scum process further comprises:

performing an ion bombardment process on the patterned resist layer.

6 . The method of claim 5 , wherein the de-scum process further comprises:

after the ion bombardment process, performing an etching process on the patterned resist layer to remove the resist scum.

7 . The method of claim 1 , wherein the de-scum process is an etching process directed to remove the resist scum.

8 . The method of claim 1 , wherein the de-scum process is an etching process directed to remove a material layer disposed below the patterned resist layer.

9 . The method of claim 1 , wherein the resist layer is a metal-containing photoresist.

10 . The method of claim 1 , wherein the resist layer is a tri-layer photoresist.

11 . The method of claim 1 , wherein the VUV radiation is emitted at a plurality of pulses.

12 . A lithography method, comprising:

performing an exposure process on a resist layer over a substrate;

performing a developing process on the resist layer to form a patterned resist layer having a plurality resist segments and a resist scum protruding from sidewalls of the resist segments and extending between two adjacent resist segments, wherein the resist scum is exposed to an exposure light at the exposure process, and wherein each resist segment has a first critical dimension after the developing process;

hardening the patterned resist layer by exposing the patterned resist layer to a photon radiation having a wavelength of 400 nm or below, wherein each resist segment has a second critical dimension after exposing the patterned resist layer to the photon radiation, and the second critical dimension is smaller than the first critical dimension, wherein exposing the patterned resist layer to a photon radiation comprises:

exposing the patterned resist layer to the photon radiation having a first exposure energy; and

exposing the patterned resist layer to a second photon radiation having a second exposure energy that is different than the first exposure energy;

after exposing the patterned resist layer to the photon radiation, bombarding the patterned resist layer with energetic particles in an environment that is substantially free of VUV light to remove the resist scum, wherein each resist segment has a third critical dimension after the bombardment process, and the third critical dimension is smaller than the second critical dimension; and

performing an etching process on the patterned resist layer.

13 . The method of claim 12 , wherein the photon radiation is generated by striking a plasma formed from a gas mixture comprising an inert gas.

14 . The method of claim 13 , wherein exposing the patterned resist layer to a photon radiation is performed under vacuum condition.

15 . The method of claim 12 , further comprising:

after exposing the patterned resist layer to the photon radiation, heating the patterned resist layer from a first temperature to a second temperature that is greater than the first temperature.

16 . The method of claim 12 , wherein the resist layer is a metal oxide based photoresist.

17 . A lithography method, comprising:

performing an exposure process on a resist layer over a substrate;

forming a patterned resist layer, wherein the patterned resist layer has a plurality resist segments and a resist scum protruding from sidewalls of the resist segments and extending between two adjacent resist segments, wherein the resist scum is exposed to an exposure light at the exposure process;

hardening the patterned resist layer in a vacuum chamber by exposing the patterned resist layer to a vacuum ultraviolet (VUV) light, wherein the VUV light maintains the resist scum, and the patterned resist layer has a reduced critical dimension after the VUV exposure, wherein exposing the patterned resist layer to the VUV light further comprises:

exposing the patterned resist layer to a first vacuum ultraviolet (VUV) radiation having a first exposure energy; and

exposing the patterned resist layer to a second VUV radiation having a second exposure energy, wherein the first exposure energy is different than the second exposure energy;

after hardening the patterned resist layer, performing an ion bombardment process on the patterned resist layer in an environment that is substantially free of VUV light to remove the resist scum; and

performing an etching process directed to remove a material layer disposed below the patterned resist layer, wherein the material layer is etched using the patterned resist layer as a mask.

18 . The method of claim 17 , further comprising:

after hardening the patterned resist layer, performing a baking process on the patterned resist layer to heat the patterned resist layer from a first temperature to a second temperature that is greater than the first temperature.

19 . The method of claim 17 , wherein the resist layer is a metal-containing photoresist.

20 . The method of claim 17 , wherein the first VUV radiation is performed for a first period of time, the second VUV radiation is performed for a second period of time that is different from the first period of time.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2021
From: LIAO, CHUN-WEI; LEE, HUI-CHUN
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 056179/0189 →
Continuity (1)
Related Publication 20220293587A1 · Sep 15, 2022
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