IP Library Granted Patent US 11,557,352
Granted Patent B2
US 11,557,352 · App. 17/244,794 · Granted Jan 17, 2023

Adjustable read retry order based on decoding success trend

Inventors: Niang-Chu Chen (Irvine, CA); Jun Tao (Ladera Ranch, CA)
Assignee: Western Digital Technologies, Inc.
G11C16/26G11C8/10G11C11/4087G11C11/5642G11C16/08G11C29/42G11C29/44G11C29/52H03M13/1102G11C16/0483G11C2211/5632
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Quick Facts
Patent No.
US 11,557,352
App. No.
17/244,794
Granted
Jan 17, 2023
Kind
B2
Abstract

Methods, systems, and media for decoding data are described. A sequence of read-level voltages for decoding operations may be determined based on a trend of decoding success indicators, including a first decoding success indicator and a second decoding success indicator. The first decoding success indicator is obtained from a more recent successful decoding operation. The first one of the sequence may be set to a read-level voltage of the first decoding success indicator. If the read-level voltage of the first decoding success indicator is less than a read-level voltage of the second decoding success indicator, then the trend is decreasing, and the second one of the sequence may be set to a read-level voltage less than that of the first one of the sequence. After executing one or more decoding operations, the decoding success indicators may be updated based on the read-level voltage of the current successful decoding operation.

Claims (83)

1. A data storage system, comprising:

storage memory; and

one or more controllers configured to cause:

determining a trend of a group of successful decoding indicators,

the group comprising first and second successful decoding indicators, the first successful decoding indicator obtained more recently than the second successful decoding indicator, a read voltage corresponding to the first successful decoding indicator being greater than a read voltage corresponding to the second successful decoding indicator when the trend is increasing;

determining a progression of decoding read voltages, to be used for one or more decoding operations, based on the trend,

the decoding read voltages comprising first and second decoding read voltages in sequence, the first decoding read voltage being less than the second decoding read voltage when the trend is increasing; and

executing the one or more decoding operations on data obtained from the storage memory,

wherein the trend indicates whether read voltages are increasing or decreasing for successful decoding.

2. The data storage system of claim 1 , wherein:

the one or more controllers are configured to cause:

applying the first decoding read voltage prior to the second decoding read voltage in the one or more decoding operations;

the first decoding read voltage is the same as the read voltage corresponding to the first successful decoding indicator; and

the second decoding read voltage is different from the read voltage corresponding to the second successful decoding indicator.

3. The data storage system of claim 1 , wherein:

the one or more controllers are configured to cause maintaining the group of successful decoding indicators, based at least on a successful one of the one or more decoding operations; and

maintaining the group of successful decoding indicators comprises:

when a decoding read voltage used for the successful one of the one or more decoding operations is different from the read voltage corresponding to the first successful decoding indicator:

setting the read voltage corresponding to the second successful decoding indicator to the read voltage corresponding to the first successful decoding indicator; and

setting the read voltage corresponding to the first successful decoding indicator to the decoding read voltage used for the successful one of the one or more decoding operations.

4. The data storage system of claim 1 , wherein:

the decoding read voltages in the progression comprise lowest and highest decoding read voltages among the decoding read voltages; and

when one decoding read voltage in the progression is the lowest or the highest decoding read voltage, and when the one decoding read voltage is not the last decoding read voltage for the one or more decoding operations,

a next decoding read voltage in the progression is a decoding read voltage next to the read voltage corresponding to the first successful decoding indicator.

5. The data storage system of claim 1 , wherein:

the decoding read voltages in the progression comprise a lowest decoding read voltage among the decoding read voltages; and

when one decoding read voltage in the progression is the lowest decoding read voltage, and when the one decoding read voltage is not the last decoding read voltage for the one or more decoding operations,

a next decoding read voltage in the progression is a decoding read voltage next to and higher than the read voltage corresponding to the first successful decoding indicator.

6. The data storage system of claim 1 , wherein:

the decoding read voltages in the progression comprise a lowest decoding read voltage and a highest decoding read voltage among the decoding read voltages in the progression; and

when one decoding read voltage in the progression is the lowest or the highest decoding read voltage, the one or more controllers are configured to cause determining a next decoding read voltage in the progression based on a direction reverse of the trend.

7. The data storage system of claim 1 , wherein determining the progression of decoding read voltages comprises setting the first decoding read voltage, which is a first one in the progression, to the read voltage corresponding to the first successful decoding indicator.

8. The data storage system of claim 7 , wherein:

determining the progression of decoding read voltages comprises setting the second decoding read voltage, which is a second one in the progression to be used for the one or more decoding operations, to a decoding read voltage that is greater than the first decoding read voltage when the trend is increasing; and

the second decoding read voltage is different from the read voltage corresponding to the second successful decoding indicator.

9. The data storage system of claim 8 , wherein a first one of the one or more decoding operations is based on the first decoding read voltage, and a subsequent one of the one or more decoding operations is based on the second decoding read voltage.

10. A method, comprising:

determining a trend of a group of successful decoding indicators,

the group comprising first and second successful decoding indicators, the first successful decoding indicator obtained more recently than the second successful decoding indicator, a read voltage corresponding to the first successful decoding indicator being greater than a read voltage corresponding to the second successful decoding indicator when the trend is increasing;

determining a progression of decoding read voltages, to be used for one or more decoding operations, based on the trend,

the decoding read voltages comprising first and second decoding read voltages in sequence, the first decoding read voltage being less than the second decoding read voltage when the trend is increasing; and

executing the one or more decoding operations on data obtained from storage memory,

wherein the trend indicates whether read voltages are increasing or decreasing for successful decoding.

11. The method of claim 10 , wherein:

the first decoding read voltage is the same as the read voltage corresponding to the first successful decoding indicator;

the second decoding read voltage is different from the read voltage corresponding to the second successful decoding indicator; and

executing the one or more decoding operations comprises executing the one or more decoding operations using the first decoding read voltage prior to using the second decoding read voltage.

12. The method of claim 10 , wherein:

the method comprises maintaining the group of successful decoding indicators, based at least on a successful one of the one or more decoding operations; and

maintaining the group of successful decoding indicators comprises:

when a decoding read voltage used for the successful one of the one or more decoding operations is different from the read voltage corresponding to the first successful decoding indicator:

setting the read voltage corresponding to the second successful decoding indicator to the read voltage corresponding to the first successful decoding indicator; and

setting the read voltage corresponding to the first successful decoding indicator to the decoding read voltage used for the successful one of the one or more decoding operations.

13. The method of claim 10 , wherein:

the decoding read voltages in the progression comprise lowest and highest decoding read voltages among the decoding read voltages; and

when one decoding read voltage in the progression is the lowest or the highest decoding read voltage, and when the one decoding read voltage is not the last decoding read voltage for the one or more decoding operations,

a next decoding read voltage in the progression is a decoding read voltage next to the read voltage corresponding to the first successful decoding indicator.

14. The method of claim 10 , wherein determining the progression of decoding read voltages comprises setting the first decoding read voltage, which is a first one in the progression, to the read voltage corresponding to the first successful decoding indicator.

15. The method of claim 14 , wherein:

determining the progression of decoding read voltages comprises setting the second decoding read voltage, which is a second one in the progression to be used for the one or more decoding operations, to a decoding read voltage that is greater than the first decoding read voltage when the trend is increasing; and

the second decoding read voltage is different from the read voltage corresponding to the second successful decoding indicator.

16. The method of claim 15 , wherein a first one of the one or more decoding operations is based on the first decoding read voltage, and a subsequent one of the one or more decoding operations is based on the second decoding read voltage.

17. An apparatus, comprising:

means for determining a trend of a group of successful decoding indicators,

the group comprising first and second successful decoding indicators, the first successful decoding indicator obtained more recently than the second successful decoding indicator, a read voltage corresponding to the first successful decoding indicator being greater than a read voltage corresponding to the second successful decoding indicator when the trend is increasing;

means for determining a progression of decoding read voltages, to be used for one or more decoding operations, based on the trend,

the decoding read voltages comprising first and second decoding read voltages in sequence, the first decoding read voltage being less than the second decoding read voltage when the trend is increasing; and

means for executing the one or more decoding operations on data read from storage memory,

wherein the trend indicates whether read voltages are increasing or decreasing for successful decoding.

18. The apparatus of claim 17 , wherein:

the first decoding read voltage is the same as the read voltage corresponding to the first successful decoding indicator;

the second decoding read voltage is different from the read voltage corresponding to the second successful decoding indicator; and

the means for executing the one or more decoding operations comprises means for executing the one or more decoding operations using the first decoding read voltage prior to using the second decoding read voltage.

19. The apparatus of claim 17 , wherein:

the apparatus comprises means for maintaining the group of successful decoding indicators, based at least on a successful one of the one or more decoding operations; and

the means for maintaining the group of successful decoding indicators comprises:

when a decoding read voltage used for the successful one of the one or more decoding operations is different from the read voltage corresponding to the first successful decoding indicator:

means for setting the read voltage corresponding to the second successful decoding indicator to the read voltage corresponding to the first successful decoding indicator; and

means for setting the read voltage corresponding to the first successful decoding indicator to the decoding read voltage used for the successful one of the one or more decoding operations.

20. The apparatus of claim 17 , wherein:

the decoding read voltages in the progression comprise lowest and highest decoding read voltages among the decoding read voltages; and

when one decoding read voltage in the progression is the lowest or the highest decoding read voltage, and when the one decoding read voltage is not the last decoding read voltage for the one or more decoding operations,

a next decoding read voltage in the progression is a decoding read voltage next to the read voltage corresponding to the first successful decoding indicator.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 057651 FRAME 0296 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058981/0958 →
SECURITY INTEREST Recorded Sep 17, 2021
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 057651/0296 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 5, 2021
From: CHEN, NIANG-CHU; TAO, JUN
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 056149/0123 →
Continuity (4)
Continuation 16824584 · Mar 19, 2020
Continuation 16052523 · Aug 1, 2018
Provisional Application 62684157 · Jun 12, 2018
Related Publication 20210249088A1 · Aug 12, 2021
Cited By (1)
US 12,482,527