Anti-flare semiconductor packages and related methods
Implementations of semiconductor packages may include: a semiconductor die having a first side and a second side. A first side of an optically transmissive lid may be coupled to the second side of the semiconductor die through one or more dams. The packages may also include a light block material around the semiconductor package extending from the first side of the semiconductor die to a second side of the optically transmissive lid. The package may include an opening in the light block material on the second side of the optically transmissive lid that substantially corresponds with an active area of the semiconductor die.
1. A semiconductor package comprising:
a semiconductor die comprising a first side and a second side;
a first side of an optically transmissive lid coupled to the second side of the semiconductor die through one or more dams;
a light block material comprised around the semiconductor package extending from the first side of the semiconductor die to a second side of the optically transmissive lid; and
an opening in the light block material on the second side of the optically transmissive lid that substantially corresponds with an active area of the semiconductor die;
wherein six outer surfaces of the semiconductor package comprise the light block material.
2. The semiconductor package of claim 1 , wherein the second side of the optically transmissive lid comprises an indentation on each of a first edge and a second edge of the optically transmissive lid.
3. The semiconductor package of claim 1 , wherein the light block material is a molding compound.
4. The semiconductor package of claim 1 , further comprising a redistribution layer coupled to the first side of the semiconductor die.
5. The semiconductor package of claim 1 , wherein the opening corresponds with a pixel array in the semiconductor die.
6. The semiconductor package of claim 1 , further comprising one or more die pads coupled to each of the one or more dams.
7. The semiconductor package of claim 1 , further comprising a plurality of through silicon vias (TSVs), a passivation layer, a solder mask, and two or more bumps.
8. A semiconductor package comprising:
a semiconductor die comprising a first side and a second side;
a first side of an optically transmissive lid coupled to the second side of the semiconductor die through one or more dams; and
a light block material encapsulating the semiconductor package;
wherein the light block material is directly coupled to a second side of the optically transmissive lid opposite the first side of the optically transmissive lid; and
wherein the light block material is directly coupled to the semiconductor die.
9. The semiconductor package of claim 8 , further comprising an opening in the light block material, wherein the optically transmissive lid is exposed through the opening.
10. The semiconductor package of claim 8 , wherein the light block material is a molding compound.
11. The semiconductor package of claim 8 , further comprising a redistribution layer (RDL) coupled to the first side of the semiconductor die.
12. The semiconductor package of claim 8 , wherein an active area of the semiconductor die corresponds with a first recess and a second recess in the optically transmissive lid.
13. The semiconductor package of claim 8 , further comprising one or more die pads coupled to each of the one or more dams.
14. The semiconductor package of claim 8 , further comprising a plurality of through silicon vias (TSVs), a passivation layer, a solder mask, and two or more bumps.
15. A semiconductor package comprising:
a semiconductor die comprising a first side and a second side;
a first side of an optically transmissive lid coupled to the second side of the semiconductor die through one or more dams;
a light block material comprised around the semiconductor package; and
an opening in the light block material on the second side of the optically transmissive lid that substantially corresponds with an active area of the semiconductor die;
wherein the one or more dams are directly coupled to the first side of the optically transmissive lid and the second side of the semiconductor die; and
wherein the light block material is directly coupled to the second side of the optically transmissive lid, the second side of the optically transmissive lid opposite the first side of the optically transmissive lid.
16. The semiconductor package of claim 15 , wherein the light block material is a molding compound.
17. The semiconductor package of claim 15 , further comprising a redistribution layer coupled to the first side of the semiconductor die.
18. The semiconductor package of claim 15 , wherein the opening corresponds with a pixel array in the semiconductor die.
19. The semiconductor package of claim 15 , further comprising one or more die pads coupled to each of the one or more dams.
20. The semiconductor package of claim 15 , further comprising a plurality of through silicon vias (TSVs), a passivation layer, a solder mask, and two or more bumps.