IP Library › Granted Patent US 12,333,275
Granted Patent B2
US 12,333,275 · App. 17/407,587 · Granted Jun 17, 2025

True random number generator (TRNG) circuit using a diffusive memristor

Inventors: Jianhua Yang (Hadley, MA); Qiangfei Xia (Amherst, MA); Hao Jiang (Sunderland, MA)
Assignee: University of Massachusetts
G06F7/588H03K3/84H10N70/245H10N70/841H10N70/8416H10N70/8833H03K19/20H04L9/0869
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Quick Facts
Patent No.
US 12,333,275
App. No.
17/407,587
Granted
Jun 17, 2025
Kind
B2
Abstract

A true random number generator device based on a diffusive memristor is disclosed. The random number generator device includes a diffusive memristor driven by a pulse generator circuit. The diffusive memristor produces a stochastically switched output signal. A comparator circuit receives the stochastically switched output signal from the diffusive memristor and generates an output signal having a random pulse width. An AND gate logic circuit is driven by a clock signal and the output signal from the comparator circuit. The AND gate logic circuit produces a combined output signal. A counter circuit receives the combined output signal from the AND gate logic circuit and generates a random bit string output signal.

Claims (23)

1. A random number generator device, comprising:

a diffusive memristor device driven by a pulse generator circuit, the diffusive memristor device producing a stochastically switched output signal;

a comparator circuit that receives the stochastically switched output signal from the diffusive memristor device and generates an output signal having a random pulse width;

an AND gate logic circuit driven by a clock signal and the output signal from the comparator circuit, the AND gate logic circuit producing a combined output signal; and

a counter circuit that receives the combined output signal from the AND gate logic circuit and generates a random bit string output signal.

2. The random number generator device of claim 1 , wherein the random bit string output signal has a frequency that is a fraction of the frequency of the clock signal.

3. The random number generator device of claim 1 , wherein the counter circuit is one of a single bit counter circuit or a multi-bit counter circuit.

4. The random number generator device of claim 1 , wherein the diffusive memristor device includes a dielectric layer formed from silver doped silicon oxide (Ag:SiO x ), wherein the Ag:SiO x dielectric layer is disposed between a bottom electrode and a top electrode.

5. The random number generator device of claim 4 , wherein at least one of the bottom electrode or the top electrode includes a layer of one of platinum (Pt), palladium (Pd) or titanium nitride (TiN).

6. The random number generator device of claim 4 ,

wherein dielectric layer includes silver nanoparticles disposed within the silicon oxide, and

wherein the diffusive memristor device further includes a silver layer formed between the dielectric layer and the top electrode.

7. The random number generator device of claim 4 , wherein the diffusive memristor device is formed on a semiconductor substrate.

8. The random number generator device of claim 7 ,

wherein the semiconductor substrate includes a silicon wafer substrate, and

wherein the diffusive memristor device further includes a titanium adhesion layer interposed between the silicon wafer substrate and the bottom electrode.

9. The random number generator device of claim 1 , wherein the diffusive memristor device includes a dielectric layer formed from a metal doped oxide, a metal bottom electrode and a metal top electrode, wherein the metal doped oxide is disposed between the metal bottom electrode and the metal top electrode.

10. The random number generator device of claim 9 ,

wherein dielectric layer includes metal nanoparticles disposed within the oxide, and

wherein the diffusive memristor device further includes an additional metal layer formed between the dielectric layer and the metal top electrode.

11. The random number generator device of claim 10 , wherein a metal corresponding to the metal nanoparticles is same as a metal included in the additional metal layer.

12. The random number generator device of claim 11 , wherein the metal includes one of silver (Ag), copper (Cu) or lithium (Li) and the oxide includes a silicon oxide (SiO x ).

13. The random number generator device of claim 9 , wherein at least one of the metal top electrode or the metal bottom electrode includes one of platinum (Pt), palladium (Pd) or titanium nitride (TiN).

Assignments (3)
CONFIRMATORY LICENSE Recorded Apr 1, 2025
From: UNIVERSITY OF MASSACHUSETTS AMHERST
To: NATIONAL SCIENCE FOUNDATION
Reel/Frame 070704/0783 →
CONFIRMATORY LICENSE Recorded Mar 27, 2025
From: UNIVERSITY OF MASSACHUSETTS AMHERST
To: NATIONAL SCIENCE FOUNDATION
Reel/Frame 070660/0061 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 20, 2021
From: YANG, JIANHUA; XIA, QIANGFEI; JIANG, HAO
To: UNIVERSITY OF MASSACHUSETTS
Reel/Frame 057240/0658 →
Continuity (3)
Division 16367623 · Mar 28, 2019
Provisional Application 62649072 · Mar 28, 2018
Related Publication 20210382696A1 · Dec 9, 2021
References Cited (68)
US 6061703A · DeBellis et al. · 2000 [cited by applicant]
US 9178153B2 · Zhang et al. · 2015 [cited by applicant]
US 9583701B1 · Gee · 2017 [cited by examiner]
US 10740672B2 · Yang et al. · 2020 [cited by applicant]
US 10741759B2 · Yang et al. · 2020 [cited by applicant]
US 11126403B2 · Yang et al. · 2021 [cited by applicant]
US 20060155551A1 · Ueda · 2006 [cited by examiner]
US 20160109356A1 · Morita · 2016 [cited by examiner]
US 20190244088A1 · Yang et al. · 2019 [cited by applicant]
US 20190303104A1 · Yang et al. · 2019 [cited by applicant]
US 20200006650A1 · Wang · 2020 [cited by examiner]
US 20200227635A1 · Yang · 2020 [cited by examiner]
Jiang, H., Belkin, D., Savel'ev, S.E. et al. A novel true random number generator based on a stochastic diffusive memristor. Nat Commun 8, 882 (2017). https://doi.org/10.1038/s41467-017-00869-x (Year: 2017). [cited by examiner]
M. Hu, Y. Wang, W. Wen, Y. Wang and H. Li, “Leveraging Stochastic Memristor Devices in Neuromorphic Hardware Systems,” in IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 6, No. 2, pp. 235-246,… [cited by examiner]
Wang, Z., Joshi, S., Savelev, S. E., Jian, H., Midya, R., Lin, P., Hu, M., Ge, N., Strachan, J.P., Li, Z., Wu, Q., Barnell, M., Li, G-L., Xin, H. L., et al. Memristors with diffusive dynamics as synaptic emulators for n… [cited by examiner]
Balatti et al., True random number generation by variability of resistive switching in oxide-based devices. IEEE J. Emerg. Sel. Topics Circuits Syst. 5, 214-221 (2015). [cited by applicant]
Balatti, et al., Physical unbiased generation of random numbers with coupled resistive switching devices. IEEE Transactions on Electron Devices 63, 2029-2035 (2016). [cited by applicant]
Bessonov, et al., Layered memristive and memcapacitive switches for printable electronics. Nature Mater. 14, 199-204 (2015). [cited by applicant]
Blackwell, “Applications of randomness in system performance measurement,” Citeseer, 1998. [cited by applicant]
Brederlow, et al., A low-power true random number generator using random telegraph noise of single-oxde-traps. In Proc. ISSCC, pp. 1666-1675, 2006. [cited by applicant]
Bucci, et al., A high-speed oscillator-based truly random number source for cryptographic applications on a smart card IC. IEEE Trans. Computers 52, 403-409 (2003). [cited by applicant]
Chang, et al., Build neuromorphic circuits with memristive devices. IEEE Circuits and Systems Magazine 13, 56-73 (2013). [cited by applicant]
Chen, Utilizing the variability of resistive random access memory to implement reconfigurable physical unclonable functions. IEEE Electron Devices Letters 59, 1172-1182 (2012). [cited by applicant]
Chua, “Memristor-the missing circuit element,” IEEE Transactions on Circuit Theory, vol. 18, pp. 507-519, 1971. [cited by applicant]
Chua, “Resistance switching memories are memristors,” Applied Physics A, vol. 102, pp. 765-783, 2011. [cited by applicant]
Evans, The internet of things: how the next evolution of the internet is changing everything. Cisco (2011). [cited by applicant]
Fang, et al. Total ionizing dose effect of γ-ray radiation on the switching characteristics and filament stability of HfOx resistive random access memory. Appl. Phys. Lett. 104, 183507 (2014). [cited by applicant]
Fujita, et al., “Si nanodevices for random number generating circuits for cryptographic security,” in 2004 IEEE International Solid-State Circuits Conference (ISSCC), 2004, pp. 294-295. [cited by applicant]
Fukushima, et al., “Spin dice: A scalable truly random number generator based on spintronics,” Applied Physics Express, vol. 7, p. 083001, 2014. [cited by applicant]
Gaba, et al., “Memristive devices for stochastic computing,” in 2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2014, pp. 2592-2595. [cited by applicant]
Gaba, et al., “Stochastic memristive devices for computing and neuromorphic applications,” Nanoscale, vol. 5, pp. 5872-5878, 2013. [cited by applicant]
Gallo, et al., Inherent stochasticity in phase-change memory devices. In Proc. 46th Eur. Solid-State Device Res. Conf. (ESSDERC), pp. 373-376, 2016. [cited by applicant]
Guan, et al., On the switching parameter variation of metal-oxide RRAM—part I: physical modeling and simulation methodology. IEEE Transactions on Electron Devices 59, 1172-1182 (2012). [cited by applicant]
Hu, et al., “Memristor Crossbar Based Neuromorphic Computing System: A Case Study,” IEEE Transactions on Neural Network and Learning System (TNNLS), vol. 25, No. 10, pp. 1864-1878, Oct. 2014. [cited by applicant]
Hu, et al., “The stochastic modeling of TiO2 memristor and its usage in neuromorphic system design,” in Asia and South Pacific Design Automation Conference (ASP-DAC), 2014, pp. 831-836. [cited by applicant]
Huang, et al., “A contact-resistive random-access-memory-based true random number generator,” IEEE Electron Device Letters, vol. 33, pp. 1108-1110, 2012. [cited by applicant]
Kim, et al., “Comprehensive Physical Model of Dynamic Resistive Switching in an Oxide Memristor,” ACS nano, vol. 8, pp. 2369-2376, 2014. [cited by applicant]
Lee, et al., “A fast, high-endurance and scalable non-volatile memory device made from asymmetric Ta2O5—x/TaO2-x bilayer structures,” Nature materials, vol. 10, pp. 625-630, 2011. [cited by applicant]
Liu, et al., A TRNG using time-dependent dielectric breakdown. Symp. VLSI Circuits Dig. Tech., Papers, pp. 216-217, 2011. [cited by applicant]
Liu, et al., Experimental characterization of physical unclonable function based on 1kb resistive random access memory arrays. IEEE Electron Dev. Lett. 36, 1380-1383 (2015). [cited by applicant]
Medeiros-Ribeiro, et al., “Lognormal switching times for titanium dioxide bipolar memristors; origin and resolution,” Nanotechnology, vol. 22, p. 095702, 2011. [cited by applicant]
Midya, et al. Anatomy of Ag/Hafnia-based selectors with 1010 nonlinearity. Adv. Mater. Accepted (2016). [cited by applicant]
Petrie, et al., A noise-based IC random number generator for applications in cryptography. IEEE Trans. Circuits and Systems I 47, 615-621 (2002). [cited by applicant]
Pi, et al., Cross point arrays of 8 nm × 8 nm memristive devices fabricated with nanoimprint lithography. Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures 31, 06FA02 (2013). [cited by applicant]
Pi, et al., Nanoscale memristive radiofrequency switches. Nature comm. 6, 7519 (2015). [cited by applicant]
Pickett, et al., Sub-100 fJ and sub-nanosecond thermally driven threshold switching in niobium oxide crosspoint nanodevices. Nanotechnology 23, 215202 (2012). [cited by applicant]
Rukhin et al. A statistical test suite for random and pseudorandom number generators for cryptographic applications. NIST, Gaithersburg, MD, USA, Special Publication 800-22, 2010. [cited by applicant]
Salaoni, et al., Coexistence of memory resistance and memory capacitance in TiO2 solid-state devices. Nanoscale Research Lett. 9, 552 (2014). [cited by applicant]
Song, et al. Monolithic integration of AgTe/TiO2 based threshold switching device with TiN liner for steep slope field-effect transistors. IEEE Electron. Dev. Meet. 2016. [cited by applicant]
Srinivasan, et al. 2.4Ghz 7mW all digital PVT-variation tolerant true random number generator in 45nm CMOS. Symp. VLSI Circuits Dig. Tech., Papers, pp. 203-204, 2010. [cited by applicant]
Strukov, et al., The missing memristor found. Nature 453, 80-83 (2008). [cited by applicant]
Tokunaga, et al., True random number generator with a metastability-based quality control. In Proc. ISSCC, pp. 404-405, 2007. [cited by applicant]
Torrezan, et al., “Sub-nanosecond switching of a tantalum oxide memristor,” Nanotechnology, vol. 22, p. 485203, 2011. [cited by applicant]
Valov, et al., Electrochemical metallization memories-fundamentas, applications, prospects. Nanotechnology 22, 254003 (2011). [cited by applicant]
Van der Leest, et al., Hardware intrinsic security to protect value in the mobile market. In Proc. Inf. Security Solutions Eur. Conf. (ISSE) pp. 188-198 (2014). [cited by applicant]
Vincent, et al., “Spin-transfer torque magnetic memory as a stochastic memristive synapse,” in Circuits and Systems (ISCAS), 2014 IEEE International Symposium on, 2014, pp. 1074-1077. [cited by applicant]
Vivoli, et al., “Device-independent quantum random number generator with a photon pair source,” arXiv preprint arXiv: 1409.8051, 2014. [cited by applicant]
Wang, et al. Memristors with diffusive dynamics as synaptic emulators for neuromorphic computing. Nature Mater. 16, 101-108 (2017). [cited by applicant]
Weber, Internet of Things (vol. 12). Springer (2010). [cited by applicant]
Wei, et al. True random number generator using current difference based on a fractional stochastic model in 40-nm embedded ReRAM. IEEE Electron. Dev. Meet. 2016. [cited by applicant]
Williams, “How we found the missing memristor,” IEEE Spectrum, vol. 45, No. 12, pp. 28-35, 2008. [cited by applicant]
Xia, et al. Memristor—CMOS Hybrid Integrated Circuits for Reconfigurable Logic. Nano Letters 9, 3640-3645 (2009). [cited by applicant]
Yang and Lu, “Nanoscale resistive switching devices: mechanisms and modeling,” Nanoscale, vol. 5, pp. 10076-10092, 2013. [cited by applicant]
Yang, et al. A 23Mb/s 23pJ/b fully synthesized true-random-number generator in 28nm and 65nm CMOS. In Proc. ISSCC, pp. 280-281, 2014. [cited by applicant]
Yang, et al., Memristive devices for computing. Nature Nanotechnology 8, 13-24 (2013). [cited by applicant]
Yasuda, et al. Physical random number generator based on MOS structure after soft breakdown. IEEE Journal of Solid-state circuits 39, 1375-1377 (2004). [cited by applicant]
Yi, et al., “Feedback write scheme for memristive switching devices,” Appl. Phys. A, vol. 102, pp. 973-982, 2011. [cited by applicant]
Yu, et al., “Stochastic learning in oxide binary synaptic device for neuromorphic computing,” Frontiers in neuroscience, vol. 7, 2013. [cited by applicant]