Granted Patent B2

US 12,369,330 · App. 17/455,737 · Granted Jul 22, 2025

Inventor: John Rozen (Hastings on Hudson, NY)

Assignee: International Business Machines Corporation

H10B61/20H10N50/01H10N50/80

Abstract

Claims (38)

1. A memory structure comprising:

a top terminal;

a multi-level nonvolatile electrochemical cell;

a bottom terminal;

a pedestal contact in the same metal level as the bottom terminal; and

a vertical conductor fully self-aligned to the multi-level nonvolatile electrochemical cell and extending vertically from the pedestal contact.

2. The structure of claim 1 , further comprising:

a dielectric sidewall spacer separating the multi-level nonvolatile electrochemical cell from the self-aligned vertical conductor.

3. The structure of claim 1 , wherein the top terminal comprises a single via.

4. The structure of claim 1 , wherein a height of the self-aligned vertical conductor is equal to a height of the multi-level nonvolatile electrochemical cell.

5. The structure of claim 1 , wherein the self-aligned vertical conductor directly contacts sidewalls of the multi-level nonvolatile electrochemical cell.

6. The structure of claim 1 , wherein the pedestal contact comprises multiple individual contact structures.

7. The structure of claim 1 , wherein the pedestal contact is a single congruent structure.

8. The structure of claim 1 , wherein the pedestal contact surrounds the bottom terminal.

9. A memory structure comprising:

a top terminal contacting a top contact;

a multi-level nonvolatile electrochemical cell;

a bottom terminal contacting a variable resistance channel of the multi-level nonvolatile electrochemical cell;

a pedestal contact in the same metal level as the bottom terminal and contacting the variable resistance channel of the multi-level nonvolatile electrochemical cell; and

a vertical conductor fully self-aligned to the multi-level nonvolatile electrochemical cell and extending vertically between the pedestal contact and the top contact.

10. The structure of claim 9 , further comprising:

a dielectric sidewall spacer separating the multi-level nonvolatile electrochemical cell from the self-aligned vertical conductor.

11. The structure of claim 9 , wherein the top terminal comprises a single via.

12. The structure of claim 9 , wherein a height of the self-aligned vertical conductor is equal to a height of the multi-level nonvolatile electrochemical cell.

13. The structure of claim 9 , wherein the self-aligned vertical conductor directly contacts sidewalls of the multi-level nonvolatile electrochemical cell.

14. The structure of claim 9 , wherein the pedestal contact comprises multiple individual contact structures.

15. The structure of claim 9 , wherein the pedestal contact is a single congruent structure.

16. The structure of claim 9 , wherein the pedestal contact surrounds the bottom terminal.

17. A method of forming a memory structure, the method comprising:

forming a top terminal contacting a top contact;

forming a multi-level nonvolatile electrochemical cell;

forming a bottom terminal contacting a variable resistance channel of the multi-level nonvolatile electrochemical cell;

forming a pedestal contact in the same metal level as the bottom terminal and contacting the variable resistance channel of the multi-level nonvolatile electrochemical cell; and

forming a vertical conducting fully self-aligned to the multi-level nonvolatile electrochemical cell and extending vertically between the pedestal contact and the top contact.

18. The method of claim 17 , further comprising:

forming a dielectric sidewall spacer separating the multi-level nonvolatile electrochemical cell from the self-aligned vertical conductor.

19. The method of claim 17 , wherein the pedestal contact comprises multiple individual contact structures.

20. The method of claim 17 , wherein the pedestal contact is a single congruent structure.

Assignments (1)

Continuity (1)

References Cited (37)