Semiconductor memory device and production method thereof
A method of producing a semiconductor memory device includes, when three directions crossing each other are set to first, second, and third directions, respectively, laminating a plurality of first laminates and a plurality of second laminates on a semiconductor substrate in the third direction. The method further includes forming ends of the plurality of first laminates in shapes of steps extending in the first direction, and forming ends of the plurality of second laminates in shapes of steps extending in both directions of the first direction and the second direction.
1. A semiconductor memory device comprising:
a plurality of first conductive films laminated in a first direction and having a first region, a second region, and a third region arranged in order in a second direction crossing the first direction, wherein
the plurality of first conductive films in the first region is divided in a third direction into a plurality of first film laminates by one or more insulating films, the third direction crossing the first direction and the second direction,
the plurality of first film laminates is respectively penetrated by a columnar body which extends in the first direction and includes a semiconductor film,
the plurality of first conductive films in the third direction is divided in the third region into a plurality of second film laminates by one or more insulating films,
the plurality of second film laminates includes a third film laminate and a fourth film laminate,
the third film laminate has a first terrace located in a first height in the first direction,
the fourth film laminate has a second terrace located in the third direction of the first terrace, and
the second terrace is located in a second height in the first direction different from the first height of the first terrace.
2. The semiconductor memory device according to claim 1 , wherein
the first terrace is connected to a first contact electrode which extends in the first direction,
the second terrace is connected to a second contact electrode which extends in the first direction, and
the first contact electrode and the second contact electrode are aligned in the third direction.
3. The semiconductor memory device according to claim 1 , wherein
the plurality of first film laminates includes a fifth film laminate and a sixth film laminate,
the fifth film laminate has a third terrace located in a third height in the first direction,
the sixth film laminate has a fourth terrace located in the third direction of the third terrace, and
the fourth terrace is located in the third height in the first direction.
4. The semiconductor memory device according to claim 3 , wherein
the third terrace is connected to a third contact electrode which extends in the first direction,
the fourth terrace is connected to a fourth contact electrode which extends in the first direction, and
the third contact electrode and the fourth contact electrode are aligned in the third direction.
5. The semiconductor memory device according to claim 3 , wherein
the fifth film laminate is penetrated by a first columnar body which extends in the first direction and includes a first semiconductor film,
the sixth film laminate is penetrated by a second columnar body which extends in the first direction and includes a second semiconductor film,
one of the plurality of first conductive films including the third terrace is penetrated by the first columnar body and the second columnar body, and
one of the plurality of first conductive films including the fourth terrace is penetrated by the first columnar body and the second columnar body.
6. The semiconductor memory device according to claim 5 , wherein the one of the plurality of first conductive films including the third terrace includes:
a first part penetrated by the first columnar body;
a second part penetrated by the second columnar body; and
a third part including the third terrace, and
the first part and the second part are electrically connected to the third part.
7. The semiconductor memory device according to claim 6 , wherein the one of the plurality of first conductive films including the fourth terrace includes:
a fourth part penetrated by the first columnar body;
a fifth part penetrated by the second columnar body; and
a sixth part including the fourth terrace, and
the fourth part and the fifth part are electrically connected to the sixth part.
8. The semiconductor memory device according to claim 1 , wherein
memory cells in the plurality of first film laminates corresponds to a single memory block.