System and method for adaptive command fetch aggregation
Systems and methods for adaptive fetch coalescing are disclosed. NVM Express (NVMe) implements a paired submission queue and completion queue mechanism, with host software on the host device placing commands into the submission queue. The host device notifies the memory device, via a doorbell update, of commands on the submission queue. Instead of fetching the command responsive to the doorbell update, the memory device may analyze one or more aspects in order to determine whether and how to coalesce fetching of the commands. In this way, the memory device may include the intelligence to coalesce fetching in order to more efficiently fetch the commands from the host device.
1. A method for a memory device, the method comprising:
determining that one or more commands are available for fetching from one or more queues of a host device;
based on the determining, the memory device causing:
assessing processing capacity of the host device based on an interrupt response time of the host device;
identifying, by the memory device, a fetching threshold;
determining whether the fetching threshold is satisfied;
based on the determining that the fetching threshold is satisfied, fetching the one or more commands from the one or more queues; and
based on the determining that the fetching threshold is unsatisfied, waiting to fetch the one or more commands from the one or more queues.
2. The method of claim 1 , wherein:
the fetching threshold is indicative of a number of commands from the one or more queues; and
determining whether the fetching threshold is satisfied comprises determining that the one or more commands meet or exceed the fetching threshold.
3. The method of claim 1 , wherein:
the fetching threshold is indicative of a wait time; and
determining whether the fetching threshold is satisfied comprises determining whether a time since a last fetch for commands is greater than or equal to the fetching threshold.
4. The method of claim 1 , further comprising:
determining whether the processing capacity of the host device exceeds a threshold;
in response to determining the processing capacity exceeds the threshold, dynamically reducing the fetching threshold; and
in response to determining the processing capacity is less than the threshold, dynamically increasing the fetching threshold.
5. The method of claim 1 , wherein the fetching threshold is based on busyness of a bus between the host device and the memory device.
6. The method of claim 1 , further comprising analyzing at least an aspect of a communication interface between the host device and the memory device to dynamically determine the fetching threshold,
wherein the one or more queues comprise one or more submission queues.
7. A memory device, comprising:
memory; and
one or more controllers configured to cause:
determining that one or more commands are available for fetching from one or more queues;
assessing processing capacity of a host device based on an interrupt response time of the host device;
determining whether a fetching threshold is satisfied;
based on the determining that the fetching threshold is satisfied, fetching the one or more commands from the one or more queues; and
based on the determining that the fetching threshold is unsatisfied, waiting to fetch the one or more commands from the one or more queues.
8. The memory device of claim 7 , wherein:
the fetching threshold is indicative of a number of commands; and
determining whether the fetching threshold is satisfied comprises determining that the one or more commands meet or exceed the fetching threshold.
9. The memory device of claim 7 , wherein the fetching threshold comprises a wait time since a last fetch for commands.
10. The memory device of claim 7 , wherein the one or more controllers are configured to cause:
determining whether the processing capacity of the host device exceeds a threshold;
in response to determining the processing capacity exceeds the threshold, dynamically reducing the fetching threshold; and
in response to determining the processing capacity is less than the threshold, dynamically increasing the fetching threshold.
11. The memory device of claim 7 , wherein the fetching threshold is based on busyness of a bus between the host device and the memory device.
12. The memory device of claim 7 , wherein the one or more controllers are configured to cause: analyzing at least an aspect of a communication interface between the host device and the memory device to dynamically determine the fetching threshold, and
wherein the one or more queues comprise one or more submission queues.
13. The memory device of claim 7 , wherein prior to determining that the one or more commands are available for fetching, the one or more controllers are configured to cause:
analyzing one or more aspects related to the one or more queues, the host device having caused the commands to be stored on the one or more queues for the memory device to process; and
determining, based on the analysis of the one or more aspects, the fetching threshold, the fetching threshold indicative of when the memory device is to fetch commands from the one or more queues.
14. The memory device of claim 13 , wherein the one or more controllers are configured to cause:
analyzing the one or more aspects related to the one or more queues by analyzing patterns between different indications from the host device.
15. An apparatus, comprising:
means for determining that one or more commands are available for fetching from one or more queues;
means for assessing processing capacity of a host device based on an interrupt response time of the host device;
means for determining whether a fetching threshold is satisfied;
based on the determining that the fetching threshold is satisfied, means for fetching the one or more commands from the one or more queues; and
based on the determining that the fetching threshold is unsatisfied, means for waiting to fetch the one or more commands from the one or more queues.
16. The apparatus of claim 15 , wherein:
the fetching threshold is indicative of a number of commands from the one or more queues; and
the means for determining whether the fetching threshold is satisfied comprises means for determining that the one or more commands meet or exceed the fetching threshold.
17. The apparatus of claim 15 , wherein the fetching threshold comprises a wait time since a last fetch for commands.
18. The apparatus of claim 15 , comprising:
means for determining whether the processing capacity of the host device exceeds a threshold;
in response to determining the processing capacity exceeds the threshold, means for dynamically reducing the fetching threshold; and
in response to determining the processing capacity is less than the threshold, means for dynamically increasing the fetching threshold.
19. The apparatus of claim 15 , wherein the fetching threshold is based on busyness of a bus between the host device and a memory device.
20. The apparatus of claim 15 , comprising: means for analyzing at least an aspect of a communication interface between the host device and a memory device to dynamically determine the fetching threshold.