IP Library › Granted Patent US 11,886,726
Granted Patent B2
US 11,886,726 · App. 17/542,943 · Granted Jan 30, 2024

Block family-based error avoidance for memory devices

Inventors: Michael Sheperek (Longmont, CO); Kishore Kumar Muchherla (Fremont, CA); Mustafa N. Kaynak (San Diego, CA); Vamsi Pavan Rayaprolu (San Jose, CA); Bruce A. Liikanen (Berthoud, CO); Peter Feeley (Boise, ID); Larry J. Koudele (Erie, CO); Shane Nowell (Boise, ID); Steven Michael Kientz (Westminster, CO)
Assignee: Micron Technology, Inc.
G06F3/064G06F3/0604G06F3/0659G06F3/0673G06F12/10G11C16/26G06F2212/1041G11C16/0483
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Quick Facts
Patent No.
US 11,886,726
App. No.
17/542,943
Granted
Jan 30, 2024
Kind
B2
Abstract

An example memory sub-system includes a memory device and a processing device, operatively coupled to the memory device. The processing device is configured to initialize a block family associated with a memory device; initialize a timeout associated with the block family; initializing a low temperature and a high temperature using a reference temperature at the memory device; responsive to programming a block residing on the memory device, associate the block with the block family; and responsive to at least one of: detecting expiration of the timeout or determining that a difference between the high temperature and the low temperature is greater than or equal to a specified threshold temperature value, close the block family.

Claims (42)

1. A system comprising:

a memory device; and

a processing device, operatively coupled to the memory device, the processing device to:

associate, with a first threshold voltage offset bin, a current block family associated with the memory device;

responsive to programming a block residing on the memory device, associate the block with the current block family; and

associate the current block family with a second threshold voltage offset bin by calibrating an oldest block family associated with the first threshold voltage offset bin.

2. The system of claim 1 , wherein associating the block with the current block family further comprises:

appending, to block family metadata, a record associating the block with the current block family.

3. The system of claim 2 , wherein the block family metadata comprises a first table including a plurality of records, wherein a record of the plurality of records associates the block with the current block family.

4. The system of claim 2 , wherein the block family metadata comprises a second table including a plurality of records, wherein each record of the plurality of records associates a plurality of dies of the current block family with respective threshold voltage offset bins.

5. The system of claim 2 , wherein the block family metadata comprises a third table including a plurality of records, wherein each record of the plurality of records associates a corresponding threshold voltage offset bin with one or more threshold voltages to be applied to respective base voltage read levels for performing read operations.

6. The system of claim 1 , wherein the processing device is further to:

initialize a low temperature and a high temperature using a reference temperature at the memory device;

responsive to determining that a difference between the high temperature and the low temperature is greater than or equal to a specified threshold temperature value, close the current block family.

7. The system of claim 6 , wherein the processing device is further to:

receive a second reference temperature of the current block family;

responsive to determining that the second reference temperature is greater than or equal to the high temperature, update the high temperature to store the second reference temperature; and

responsive to determining that the second reference temperature falls below the low temperature, update the low temperature to store the second reference temperature.

8. The system of claim 6 , wherein the processing device is further to:

responsive to closing the current block family, initialize a new block family.

9. The system of claim 1 , wherein the processing device is further to:

read, using a threshold voltage offset associated with the second threshold voltage offset bin, data from a block of the current block family.

10. The system of claim 1 , wherein the block family comprises a plurality of blocks that have been programmed within at least one of: a specified time window or a specified temperature window.

11. A method, comprising:

identifying, by a processing device, based on block family metadata associated with a memory device, a block family associated with a physical block of the memory device;

identifying a first threshold voltage offset bin associated with the block family;

associating the block family with a second threshold voltage offset bin by calibrating an oldest block family associated with the first threshold voltage offset bin;

reading, using a threshold voltage offset associated with the second threshold voltage offset bin, data from the physical block.

12. The method of claim 11 , wherein the block family comprises a plurality of blocks that have been programmed within at least one of: a specified time window or a specified temperature window.

13. The method of claim 11 , wherein the block family metadata comprises a first table including a plurality of records, wherein a record of the plurality of records associates the physical block with the block family.

14. The method of claim 11 , wherein the block family metadata comprises a second table including a plurality of records, wherein each record of the plurality of records associates a plurality of dies of the block family with respective threshold voltage offset bins.

15. The method of claim 11 , wherein the block family metadata comprises a third table including a plurality of records, wherein each record of the plurality of records associates a corresponding threshold voltage offset bin with one or more threshold voltages to be applied to respective base voltage read levels for performing read operations.

16. A method, comprising:

associating, by a processing device, a current block family of a memory device with a first threshold voltage offset bin;

responsive to programming a block residing on the memory device, associating the block with the current block family; and

associating the current block family with a second threshold voltage offset bin by calibrating an oldest block family associated with the first threshold voltage offset bin.

17. The method of claim 16 , wherein associating the block with the current block family further comprises:

appending, to block family metadata, a record associating the block with the current block family.

18. The method of claim 17 , wherein the block family metadata comprises a second table including a plurality of records, wherein each record of the plurality of records associates a plurality of dies of the current block family with respective threshold voltage offset bins.

19. The method of claim 16 , wherein the current block family comprises a plurality of blocks that have been programmed within at least one of: a specified time window or a specified temperature window.

20. The method of claim 16 , further comprising:

reading, using a threshold voltage offset associated with the second threshold voltage offset bin, data from a block of the current block family.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 7, 2021
From: SHEPEREK, MICHAEL; MUCHHERLA, KISHORE KUMAR; KAYNAK, MUSTAFA N.; RAYAPROLU, VAMSI PAVAN; LIIKANEN, BRUCE A.; FEELEY, PETER; KOUDELE, LARRY J.; NOWELL, SHANE; KIENTZ, STEVEN MICHAEL
To: MICRON TECHNOLOGY, INC.
Reel/Frame 058315/0683 →
Continuity (3)
Continuation 16800221 · Feb 25, 2020
Provisional Application 62950341 · Dec 19, 2019
Related Publication 20220091741A1 · Mar 24, 2022
Cited By (3)
US 12,307,111 US 12,602,189 US 12,724,568