Method for producing substrate having through-silicon vias, substrate having through-silicon vias, and copper paste for through-silicon via formation
An aspect of the invention is a method for producing a substrate having through-silicon vias, the method including a preparation step of preparing a silicon substrate provided with through-holes, in which the through-holes communicate with both principal surfaces; a copper sintered body formation step of forming a copper sintered body having a porous structure such that the copper sintered body fills at least the through-holes; a resin impregnation step of impregnating the copper sintered body with a curable resin composition; and a resin curing step of curing the curable resin composition impregnated into the copper sintered body to form an electric conductor that includes the copper sintered body having pores filled with a resin cured product, and providing through-silicon vias in the through-holes.
1. A method for producing a substrate having through-silicon vias, the method comprising:
a preparation step of preparing a silicon substrate including a silicon wafer provided with through-holes, the silicon substrate having the through-holes communicating with both principal surfaces;
a copper sintered body formation step of forming a copper sintered body having a porous structure such that the copper sintered body fills at least the through-holes; and then
a resin impregnation step of impregnating the copper sintered body with a curable resin composition; and then
a resin curing step of curing the curable resin composition impregnated into the copper sintered body to form an electric conductor including the copper sintered body, the copper sintered body having pores filled with a resin cured product, and providing through-silicon vias in the through-holes.
2. The method according to claim 1 , wherein the filling ratio of the resin cured product in the electric conductor is 80% by volume or more based on the volume of the internal space of the pores.
3. The method according to claim 1 , wherein the porosity of the copper sintered body is 1% to 15% by volume based on the volume of the copper sintered body.
4. The method according to claim 1 , wherein in the copper sintered body formation step, the copper sintered body is formed so as to cover at least a portion of the principal surfaces of the silicon substrate.
5. The method according to claim 4 , further comprising an electric conductor removal step of removing at least a portion of the electric conductor formed on the principal surfaces of the silicon substrate.
6. The method according to claim 5 , wherein the removing means for the electric conductor removal step is one or more selected from the group consisting of etching, mechanical polishing, and chemical mechanical polishing.
7. The method according to claim 1 , wherein the silicon substrate includes a metal coating film provided at least on the wall surfaces of the through-holes.
8. The method according to claim 1 , wherein the ratio L/D of the length L to the hole diameter D of the through-silicon vias is 10 or more.
9. The method according to claim 1 , wherein the copper sintered body formation step includes:
a copper paste filling step of filling the through-holes of the silicon substrate with a copper paste including copper particles; and
a copper paste calcining step of calcining the copper paste to form the copper sintered body.
10. The method according to claim 9 , wherein the copper paste includes, as the copper particles, first copper particles having a particle size of 0.8 μm or more and second copper particles having a particle size of 0.5 μm or less.
11. The method according to claim 10 , wherein the first copper particles have a flat shape.
12. The method according to claim 9 , wherein the copper paste is calcined at an added pressure of 0.1 MPa or higher.
13. The method according to claim 9 , wherein the copper paste is calcined in an atmosphere including nitrogen or hydrogen.