IP Library › Granted Patent US 12,211,794
Granted Patent B2
US 12,211,794 · App. 17/648,821 · Granted Jan 28, 2025

Integrated circuits and methods for forming thin film crystal layers

Inventors: Carl Naylor (Portland, OR); Ashish Agrawal (Hillsboro, OR); Kevin Lin (Beaverton, OR); Abhishek Anil Sharma (Portland, OR); Mauro Kobrinsky (Portland, OR); Christopher Jezewski (Portland, OR); Urusa Alaan (Hillsboro, OR)
Assignee: Intel Corporation
H01L23/53238H01L21/02568H01L21/02614H01L21/76843H01L21/76867H01L23/5226H01L29/24H01L29/45H01L29/66969H01L29/786H01L21/28568
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Quick Facts
Patent No.
US 12,211,794
App. No.
17/648,821
Granted
Jan 28, 2025
Kind
B2
Abstract

An aspect of the disclosure relates to an integrated circuit. The integrated circuit includes a first electrically conductive structure, a thin film crystal layer located on the first electrically conductive structure, and a second electrically conductive structure including metal e.g. copper. The second electrically conductive structure is located on the thin film crystal layer. The first electrically conductive structure is electrically connected to the second electrically conductive structure through the thin film crystal layer. The thin film crystal layer may be provided as a copper diffusion barrier.

Claims (23)

1. A method for forming a thin film crystal layer, the method comprising:

depositing a metal layer on a carrier substrate, wherein the metal layer has a thickness smaller than 10 nm;

heating the deposited metal layer in a gas atmosphere for transforming the metal layer into a thin film crystal layer after depositing the metal layer;

providing a semiconductor substrate to a side of the thin film crystal layer opposite to the carrier substrate; and

removing the carrier substrate.

2. The method according to claim 1 , wherein the metal layer is deposited using chemical vapor deposition.

3. The method according to claim 1 , wherein the metal layer is heated up to at least 500° C. before providing the semiconductor substrate on the thin film crystal layer.

4. The method according to claim 1 , wherein a maximum temperature during the heating is 400° C.

5. The method according to claim 1 , further comprising

removing at least a portion of the metal layer, wherein the metal layer comprises a first metal; and

forming a further metal layer comprising a second metal, different from the first metal, so that a layer comprising at least a first portion of the first metal and a second portion of the second metal is formed before the heating,

wherein the heating in the gas atmosphere causes the first portion of the layer to transform into a first thin film crystal layer material, and the second portion of the layer to transform simultaneously into a second thin film crystal layer material.

6. The method according to claim 1 , further comprising

forming a mask layer on a portion of the metal layer before heating the metal layer;

exposing a first portion of the metal layer uncovered by the mask layer to a first gas atmosphere during heating, to transform the metal of the first portion into a first thin film crystal layer material;

removing the mask layer and forming a further mask layer on the first portion; and

exposing a second portion of the metal layer uncovered by the mask layer to a second gas atmosphere during a subsequent heating, to transform the metal of the second portion into a second thin film crystal layer material.

7. The method according to claim 1 , wherein the thin film crystal layer is formed during forming an integrated circuit in a backend of line process.

8. The method according to claim 1 , further comprising:

structuring the metal layer to form at least two portions of a layer of different metals;

forming a spacer at a side of a portion of the layer between the at least two portions, to laterally separate the at least two portions of the layer; and

removing the spacer before heating the layer in the gas atmosphere.

9. The method according to claim 1 , wherein the metal layer is deposited on a first electrically conductive structure, the method further comprising forming a second electrically conductive structure on the formed thin film crystal layer, wherein one of the first electrically conductive structure and the second electrically conductive structure comprises copper atoms.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 18, 2026
From: INTEL CORPORATION
To: INTEL FOUNDRY IP LLC
Reel/Frame 076063/0964 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 25, 2024
From: NAYLOR, CARL; AGRAWAL, ASHISH; LIN, KEVIN; SHARMA, ABHISHEK; KOBRINSKY, MAURO; JEZEWSKI, CHRISTOPHER; ALAAN, URUSA
To: INTEL CORPORATION
Reel/Frame 069016/0363 →
Continuity (2)
Continuation 16221798 · Dec 17, 2018
Related Publication 20220148917A1 · May 12, 2022
References Cited (4)
US 11830788B2 · Naylor · 2023 [cited by examiner]
US 20170011915A1 · Cannara · 2017 [cited by examiner]
US 20170033003A1 · Song · 2017 [cited by examiner]
US 20180269291A1 · Lin · 2018 [cited by examiner]