IP Library Granted Patent US 11,881,398
Granted Patent B2
US 11,881,398 · App. 17/661,890 · Granted Jan 23, 2024

Semiconductor device and method for supporting ultra-thin semiconductor die

Inventors: Gordon M. Grivna (Mesa, AZ); Stephen St. Germain (Gilbert, AZ)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H01L21/02381H01L21/0254H01L21/4825H01L21/78H01L23/145H01L23/15H01L23/49562H01L23/49827H01L23/49838H01L23/49844H01L29/2003H01L2224/48247H01L2224/49171
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Quick Facts
Patent No.
US 11,881,398
App. No.
17/661,890
Granted
Jan 23, 2024
Kind
B2
Abstract

A first semiconductor substrate contains a first semiconductor material, such as silicon. A second semiconductor substrate containing a second semiconductor material, such as gallium nitride or aluminum gallium nitride, is formed on the first semiconductor substrate. The first semiconductor substrate and second semiconductor substrate are singulated to provide a semiconductor die including a portion of the second semiconductor material supported by a portion of the first semiconductor material. The semiconductor die is disposed over a die attach area of an interconnect structure. The interconnect structure has a conductive layer and optional active region. An underfill material is deposited between the semiconductor die and die attach area of the interconnect structure. The first semiconductor material is removed from the semiconductor die and the interconnect structure is singulated to separate the semiconductor die. The first semiconductor material can be removed post interconnect structure singulation.

Claims (35)

1. A semiconductor device, comprising:

a semiconductor die comprising a semiconductor material and a first conductive layer directly coupled to the semiconductor material;

an interconnect structure including a die attach area, wherein the semiconductor die is coupled over the die attach area;

a second conductive layer comprised in the interconnect structure;

an insulating layer between the second conductive layer and the semiconductor die, the insulating layer comprising a first opening within the die attach area and a second opening outside the die attach area; and

a conductive material coupled between and directly to both the first conductive layer and the second conductive layer, wherein the conductive material extends through the first opening and the second opening;

wherein the second conductive layer extends beyond and out from under a perimeter of the semiconductor die coupled over the die attach area.

2. The semiconductor device of claim 1 , wherein the semiconductor material is directly coupled to one of an encapsulant or a mold compound, wherein the one of the encapsulant or the mold compound is directly coupled to a first side of the semiconductor die opposite a side of the semiconductor die comprising the first conductive layer.

3. The semiconductor device of claim 1 , further including an underfill material deposited between the semiconductor die and the die attach area, wherein the underfill material is between and directly coupled to the first conductive layer and the second conductive layer.

4. The semiconductor device of claim 1 , wherein the interconnect structure includes an active device.

5. The semiconductor device of claim 1 , wherein the interconnect structure includes a leadframe.

6. The semiconductor device of claim 1 , further including a protective layer formed over the semiconductor die.

7. The semiconductor device of claim 1 , further including a conductive via formed through the interconnect structure coupled with the semiconductor die.

8. A semiconductor device, comprising:

a semiconductor die;

an interconnect structure coupled to the semiconductor die, the interconnect structure comprising a first side, a second side opposite the first side, a conductive layer, and a die attach area, wherein the first side of the interconnect structure faces the semiconductor die; and

an insulating layer between the conductive layer and the semiconductor die, the insulating layer comprising a first opening within the die attach area and a second opening outside the die attach area;

wherein the conductive layer extends beyond and out from under a perimeter of the semiconductor die coupled over the die attach area; and

wherein the first side of the interconnect structure is exposed through the first opening and the second opening.

9. The semiconductor device of claim 8 , wherein the semiconductor die includes silicon.

10. The semiconductor device of claim 8 , further comprising a bond wire coupled with the interconnect structure, wherein the bond wire extends through the insulating layer.

11. The semiconductor device of claim 8 , further including an underfill material deposited between the semiconductor die and the die attach area of the interconnect structure, wherein the underfill material is directly coupled to the conductive layer and the insulating layer.

12. The semiconductor device of claim 8 , wherein the interconnect structure includes an active device.

13. The semiconductor device of claim 8 , wherein the interconnect structure includes a leadframe.

14. The semiconductor device of claim 8 , further including a protective layer formed over the semiconductor die.

15. The semiconductor device of claim 8 , further including a conductive via formed through the interconnect structure under the semiconductor die.

16. A semiconductor device, comprising:

a semiconductor die comprising a semiconductor material and a first conductive layer directly coupled to the semiconductor material;

an interconnect structure coupled to the semiconductor die, the interconnect structure comprising a die attach area and a second conductive layer;

an insulating layer coupled over the second conductive layer, the insulating layer comprising a first opening within the die attach area and a second opening entirely outside of the die attach area; and

an underfill material coupled between and directly to the first conductive layer and the second conductive layer;

wherein the first conductive layer and the second conductive layer are coupled through a conductive material; and

wherein the second conductive layer extends beyond and out from under a perimeter of the semiconductor die coupled over the die attach area.

17. The semiconductor device of claim 16 , wherein an active device coupled with a die attach area and the semiconductor die are in a cascode configuration.

18. The semiconductor device of claim 16 , wherein the interconnect structure comprises a leadframe.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS, RECORDED AT REEL 061071, FRAME 052 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, AS GRANTOR; ON SEMICONDUCTOR CONNECTIVITY SOLUTIONS, INC., AS GRANTOR
Reel/Frame 064067/0654 →
SECURITY INTEREST Recorded Aug 4, 2022
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; ON SEMICONDUCTOR CONNECTIVITY SOLUTIONS, INC.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 061071/0525 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 3, 2022
From: GRIVNA, GORDON M.; ST. GERMAIN, STEPHEN
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 059801/0867 →
Continuity (4)
Continuation 16861615 · Apr 29, 2020
Continuation 16144750 · Sep 27, 2018
Division 15446281 · Mar 1, 2017
Related Publication 20220262633A1 · Aug 18, 2022