IP Library Granted Patent US 12,224,248
Granted Patent B2
US 12,224,248 · App. 17/688,099 · Granted Feb 11, 2025

Semiconductor wafer and semiconductor dies formed therefrom including grooves along long edges of the semiconductor dies

Inventors: Chin-Tien Chiu (Taichung, TW); Jia Li (Shanghai, CN); Dongpeng Xue (Shanghai, CN); Huirong Zhang (Shanghai, CN); Guocheng Zhong (Shanghai, CN); Xiaohui Wang (Shanghai, CN); Hua Tan (Shanghai, CN)
Assignee: Sandisk Technologies, Inc.
H01L23/544H01L25/0657H01L2223/5446H01L2223/5448H01L2225/06506H01L2225/0651H01L2225/06562H10B41/20H10B43/20
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Quick Facts
Patent No.
US 12,224,248
App. No.
17/688,099
Granted
Feb 11, 2025
Kind
B2
Abstract

A semiconductor wafer includes semiconductor dies and laser grooves formed in the scribe lines along the long edges of the semiconductor dies. A laser groove extends between the long edges of two adjacent semiconductor dies to encompass the corners of the two adjacent semiconductor dies. When diced, the resulting semiconductor dies have portions of the corners removed.

Claims (34)

1. A semiconductor wafer having an x-axis and a y-axis, the semiconductor wafer comprising:

a plurality of semiconductor dies comprising integrated circuits, each of the plurality of semiconductor dies comprising a length oriented along the y-axis and a width oriented along the x-axis, the length being longer than the width;

a first set of scribe lines oriented along the y-axis between adjacent semiconductor dies of the plurality of semiconductor dies;

a second set of scribe lines oriented along the x-axis between adjacent semiconductor dies of the plurality of semiconductor dies;

a plurality of grooves formed in the first set of scribe lines oriented along the y-axis, the plurality of grooves extending along a first portion the length of a first semiconductor die of the plurality of semiconductor dies, and along a second portion of a second semiconductor die of the plurality of semiconductor dies, the second semiconductor die being adjacent to the first semiconductor die along the y-axis;

wherein a groove of the plurality of grooves is formed to a depth which is greater than a thickness of the semiconductor wafer after the semiconductor wafer is thinned to its final thickness.

2. The semiconductor wafer of claim 1 , wherein the second set of scribe lines are devoid of the plurality of grooves, except where the first set of scribe lines cross the second set of scribe lines.

3. The semiconductor wafer of claim 1 , wherein the plurality of grooves comprise a plurality of laser grooves formed by a laser.

4. The semiconductor wafer of claim 1 , wherein the plurality of grooves comprise a plurality of grooves formed by photolithography.

5. The semiconductor wafer of claim 1 , wherein the length of a groove of the plurality of grooves is 1400 microns to 1800 microns.

6. The semiconductor wafer of claim 1 , wherein the length of the groove intersects a scribe line of the second set of scribe lines.

7. The semiconductor wafer of claim 1 , wherein a width of a groove of the plurality of grooves is 50% to 100% of a width of a scribe line of the first set of scribe lines.

8. A semiconductor die formed from a semiconductor wafer, the semiconductor die comprising:

a first major surface;

a second major surface opposed to the first major surface;

a length defined by long edges of the semiconductor die;

a width defined by short edges of the semiconductor die, the length being greater than the width;

an active area on the first major surface including integrated circuits;

a border surrounding the active area along the long and short edges of the semiconductor die; and

one or more grooves formed within the border and extending from one or more corners of the semiconductor die partially along one or both long edges of the semiconductor die, the one or more grooves configured to prevent damage to the semiconductor die.

9. The semiconductor die of claim 8 , wherein the short edges of the semiconductor die are devoid of the one or more grooves, except where the short edges meet the long edges.

10. The semiconductor die of claim 8 , wherein the one or more grooves comprise a pair of grooves along portions of both of the long edges of the semiconductor die.

11. The semiconductor die of claim 8 , wherein the one or more grooves comprise a plurality of laser grooves formed by a laser.

12. The semiconductor die of claim 8 , wherein a groove of the one or more grooves is formed to a full thickness of the semiconductor die.

13. The semiconductor die of claim 8 , wherein a groove of the one or more grooves is formed in the first major surface to a depth which is less than a thickness of the semiconductor die.

14. The semiconductor die of claim 8 , wherein the length of a groove of the one or more grooves is 700 microns to 900 microns.

15. A semiconductor die formed from a semiconductor wafer, the semiconductor die comprising:

a first major surface;

a second major surface opposed to the first major surface;

a length defined by long edges of the semiconductor die;

a width defined by short edges of the semiconductor die, the length being greater than the width;

an active area on the first major surface including integrated circuits;

a border surrounding the active area along the long and short edges of the semiconductor die; and

means for preventing cracking of the semiconductor die within the border and extending from one or more corners of the semiconductor die partially along one or both long edges of the semiconductor die.

Assignments (8)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 7, 2022
From: CHIU, CHIN-TIEN; LI, JIA; XUE, DONGPENG; ZHANG, HUIRONG; ZHONG, GUOCHENG; WANG, XIAOHUI; TAN, HUA
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059184/0858 →
Continuity (1)
Related Publication 20230282594A1 · Sep 7, 2023
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