IP Library › Granted Patent US 12,652,810
Granted Patent B2
US 12,652,810 · App. 17/698,939 · Granted Jun 9, 2026

Inductors for hybrid bonding interconnect architectures

Inventors: Qiang Yu (Saratoga, CA); Gwang-Soo Kim (Portland, OR); Said Rami (Portland, OR)
Assignee: Intel Corporation
H10D1/20H10W20/497H10W90/00H10W72/926H10W72/936H10W72/9445H10W80/701H10W90/792
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Quick Facts
Patent No.
US 12,652,810
App. No.
17/698,939
Granted
Jun 9, 2026
Kind
B2
Abstract

In one embodiment, an apparatus includes a first integrated circuit die with metal bonding pads that are co-planar with an external surface of the die and a second integrated circuit die with metal bonding pads that are co-planar with an external surface of the die. The first and second integrated circuit dies are coupled together such that their external surfaces are in contact and the metal pads of the first integrated circuit die are in direct contact with respective metal pads of the second integrated circuit die. The apparatus also includes an inductor formed at least partially by the metal pads of the first integrated circuit die and the metal pads of the second integrated circuit die.

Claims (65)

1 . A multi-die apparatus comprising:

a first integrated circuit die comprising metal bonding pads that are co-planar with an external surface of the die;

a second integrated circuit die comprising metal bonding pads that are co-planar with an external surface of the die, wherein the second integrated circuit die is coupled to the first integrated circuit die such that the external surface of the first integrated circuit die is in contact with the external surface of the second integrated circuit die and the metal bonding pads of the first integrated circuit die are in direct contact with respective metal bonding pads of the second integrated circuit die; and

an inductor formed by traces in the first integrated circuit die, traces in the second integrated circuit die, a subset of the metal bonding pads of the first integrated circuit die, and a subset of the metal bonding pads of the second integrated circuit die.

2 . The apparatus of claim 1 , wherein the inductor comprises one or more coils arranged to produce a magnetic field orthogonal to the external surfaces of the integrated circuit dies.

3 . The apparatus of claim 1 , wherein:

the first integrated circuit die comprises traces that are co-planar with the external surface of the die;

the second integrated circuit die comprises traces that are co-planar with the external surface of the die; and

the inductor is formed at least partially by the traces of the first integrated circuit die that are co-planar with the external surface of the first integrated circuit die and the traces of the second integrated circuit die that are co-planar with the external surface of the second integrated circuit die.

4 . The apparatus of claim 3 , wherein the traces of the first integrated circuit die that are co-planar with the external surface of the first integrated circuit die are not in contact with the traces of the second integrated circuit die that are co-planar with the external surface of the second integrated circuit die.

5 . The apparatus of claim 1 , wherein the inductor comprises one or more coils arranged to produce a magnetic field co-planar with the external surfaces of the integrated circuit dies.

6 . The apparatus of claim 1 , wherein

the first integrated circuit die comprises internal metal layers;

the second integrated circuit die comprises internal metal layers; and

the inductor is formed at least partially by traces in the internal metal layers of the first integrated circuit die and traces in the internal metal layers of the second integrated circuit die.

7 . The apparatus of claim 1 , wherein the inductor comprises:

first traces of the first integrated circuit die in an internal metal layer;

second traces of the first integrated circuit die that are co-planar with the external surface of the die;

first traces of the second integrated circuit die that are co-planar with the external surface of the die; and

second traces of the second integrated circuit die in an internal metal layer.

8 . The apparatus of claim 7 , wherein:

the first traces of the first integrated circuit die are connected to the first traces of the second integrated circuit die through a metal bonding pad of the first integrated circuit die;

the first traces of the second integrated circuit die are connected to the second traces of the first integrated circuit die; and

the second traces of the first integrated circuit die are connected to the second traces of the second integrated circuit die through a metal bonding pad of the second integrated circuit die.

9 . The apparatus of claim 1 , wherein the inductor comprises:

first traces in an internal metal layer of the first integrated circuit die;

second traces in an internal metal layer of the second integrated circuit die; and

third traces coupling the first traces and second traces, the third traces comprising the metal bonding pads of the first integrated circuit die, the metal bonding pads of the second integrated circuit die, and vias between the traces in the internal metal layers and the metal bonding pads.

10 . The apparatus of claim 9 , wherein the third traces further comprise portions of other internal metal layers of the first integrated circuit die and the second integrated circuit die.

11 . The apparatus of any claim 1 , wherein a density of metal on the external surface of the first integrated circuit die is substantially constant across the surface, and a density of metal on the external surface of the second integrated circuit die is substantially constant across the surface.

12 . An integrated circuit assembly comprising:

a package substrate; and

a multi-die complex coupled to the package substrate, the multi-die complex comprising:

a first integrated circuit die comprising metal bonding pads that are co-planar with an external surface of the die;

a second integrated circuit die comprising metal bonding pads that are co-planar with an external surface of the die, wherein the second integrated circuit die is coupled to the first integrated circuit die such that the external surface of the first integrated circuit die is in contact with the external surface of the second integrated circuit die and the metal bonding pads of the first integrated circuit die are in direct contact with respective metal bonding pads of the second integrated circuit die; and

an inductor formed by traces in the first integrated circuit die, traces in the second integrated circuit die, a subset of the metal bonding pads of the first integrated circuit die and a subset of the metal bonding pads of the second integrated circuit die.

13 . The integrated circuit assembly of claim 12 , wherein the inductor comprises one or more coils arranged to produce a magnetic field orthogonal to the external surfaces of the integrated circuit dies.

14 . The integrated circuit assembly of claim 12 , wherein:

the first integrated circuit die comprises traces that are co-planar with the external surface of the die;

the second integrated circuit die comprises traces that are co-planar with the external surface of the die; and

the inductor is formed at least partially by the traces of the first integrated circuit die that are co-planar with the external surface of the first integrated circuit die and the traces of the second integrated circuit die that are co-planar with the external surface of the second integrated circuit die.

15 . The integrated circuit assembly of claim 14 , wherein the traces of the first integrated circuit die that are co-planar with the external surface of the first integrated circuit die are not in contact with the traces of the second integrated circuit die that are co-planar with the external surface of the second integrated circuit die.

16 . The integrated circuit assembly of claim 12 , wherein the inductor comprises one or more coils arranged to produce a magnetic field co-planar with the external surfaces of the integrated circuit dies.

17 . The integrated circuit assembly of claim 12 , wherein

the first integrated circuit die comprises internal metal layers;

the second integrated circuit die comprises internal metal layers; and

the inductor is formed at least partially by traces in the internal metal layers of the first integrated circuit die and traces in the internal metal layers of the second integrated circuit die.

18 . The integrated circuit assembly of claim 12 , wherein a density of metal on the external surface of the first integrated circuit die is substantially constant across the surface, and a density of metal on the external surface of the second integrated circuit die is substantially constant across the surface.

19 . The integrated circuit assembly of claim 12 , further comprising a main circuit board, wherein the package substrate is coupled to the main circuit board.

20 . A computing system comprising:

memory; and

a processor comprising:

a first integrated circuit die comprising metal bonding pads that are co-planar with an external surface of the die;

a second integrated circuit die comprising metal bonding pads that are co-planar with an external surface of the die, wherein the second integrated circuit die is coupled to the first integrated circuit die such that the external surface of the first integrated circuit die is in contact with the external surface of the second integrated circuit die and the metal bonding pads of the first integrated circuit die are in direct contact with respective metal bonding pads of the second integrated circuit die; and

an inductor formed by traces in the first integrated circuit die, traces in the second integrated circuit die, a subset of the metal bonding pads of the first integrated circuit die and a subset of the metal bonding pads of the second integrated circuit die.

21 . The computing system of claim 20 , wherein the inductor comprises one or more coils arranged to produce a magnetic field orthogonal to the external surfaces of the integrated circuit dies.

22 . The computing system of claim 20 , wherein:

the first integrated circuit die comprises traces that are co-planar with the external surface of the die;

the second integrated circuit die comprises traces that are co-planar with the external surface of the die; and

the inductor is formed at least partially by the traces of the first integrated circuit die that are co-planar with the external surface of the first integrated circuit die and the traces of the second integrated circuit die that are co-planar with the external surface of the second integrated circuit die.

23 . The computing system of claim 20 , wherein the inductor comprises one or more coils arranged to produce a magnetic field co-planar with the external surfaces of the integrated circuit dies.

24 . The computing system of claim 20 , wherein:

the first integrated circuit die comprises internal metal layers;

the second integrated circuit die comprises internal metal layers; and

the inductor is formed at least partially by traces in the internal metal layers of the first integrated circuit die and traces in the internal metal layers of the second integrated circuit die.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 22, 2022
From: YU, QIANG; KIM, GWANG-SOO; RAMI, SAID
To: INTEL CORPORATION
Reel/Frame 059343/0469 →
Continuity (1)
Related Publication 20230299123A1 · Sep 21, 2023
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