IP Library › Granted Patent US 12,451,347
Granted Patent B2
US 12,451,347 · App. 17/701,433 · Granted Oct 21, 2025

Semiconductor processing method

Inventors: Wangyu Lim (Hwaseong-si, KR); Heesung Kang (Anyang-si, KR); Jaeok Ko (Seoul, KR); Jaebin Ahn (Suwon-si, KR); Sunja Kim (Hwaseong-si, KR); Youngjae Kim (Cheonan-si, KR); Donghyun Ko (Hwaseong-si, KR)
Assignee: ASM IP Holding B.V.
H01L21/02312H01L21/764
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Quick Facts
Patent No.
US 12,451,347
App. No.
17/701,433
Granted
Oct 21, 2025
Kind
B2
Abstract

A substrate processing method of forming an air gap includes: forming deposition inhibitor sites in a lower space between a first protrusion and a second protrusion; and forming film-forming sites and an interlayer insulating layer on the first protrusion and the second protrusion, wherein the interlayer insulating layer is selectively formed in an upper space between the first protrusion and the second protrusion by the deposition inhibitor sites and the film-forming layer, and thus an air gap is formed between the first protrusion and the second protrusion.

Claims (30)

1. A substrate processing method comprising:

forming a protective layer on a pattern structure including an upper surface, a lower surface, and a side surface connecting the upper surface and the lower surface;

supplying a fluorine-containing gas under a first plasma condition comprising a first frequency and first process pressure to form fluorine-terminated sites on the protective layer;

purging the fluorine-containing gas;

supplying a hydrogen-containing gas under a second plasma condition comprising a second frequency higher than the first frequency and second process pressure higher than the first process pressure to form hydrogen-terminated sites on the protective layer;

purging the hydrogen-containing gas;

supplying a silicon-containing source gas to form Si—H-terminated sites, wherein the forming of the Si—H-terminated sites is promoted on the hydrogen-terminated sites and inhibited on the fluorine-terminated sites;

purging the silicon-containing source gas;

forming an interlayer insulating layer on the protective layer by supplying a reactive gas having reactivity with the Si—H-terminated sites; and

purging the reactive gas.

2. The substrate processing method of claim 1 , wherein

the fluorine-terminated sites are at a first portion of the protective layer in a lower portion of the pattern structure, and

the hydrogen-terminated sites are at a second portion of the protective layer in an upper portion of the pattern structure.

3. The substrate processing method of claim 2 , wherein the forming the interlayer insulating layer is inhibited on the first portion.

4. The substrate processing method of claim 1 , wherein the forming of the interlayer insulating layer further comprises

supplying a reactive gas.

5. The substrate processing method of claim 1 , further comprising forming a second layer on the interlayer insulating layer.

6. The substrate processing method of claim 5 , wherein the second layer comprises silicon nitride.

7. The substrate processing method of claim 5 , wherein the second layer comprises silicon oxide.

8. The substrate processing method of claim 1 , wherein the step of supplying a fluorine-containing gas is performed at least once.

9. The substrate processing method of claim 1 , wherein the fluorine-containing gas includes NF 3 .

10. The substrate processing method of claim 1 , wherein, the step of supplying a hydrogen-containing gas is performed at least once.

11. The substrate processing method of claim 1 , wherein the hydrogen-containing gas includes H 2 .

12. The substrate processing method of claim 1 , comprising forming

an air gap.

13. The substrate processing method of claim 12 , wherein the air gap includes a gas containing a fluorine element.

14. The substrate processing method of claim 1 , wherein the step of forming the interlayer insulating layer comprises a cyclical process.

15. The substrate processing method of claim 14 , wherein a cycle of the cyclical process is repeated a number of times.

16. The substrate processing method of claim 1 , wherein the interlayer insulating layer comprises silicon nitride.

17. The substrate processing method of claim 1 , wherein the interlayer insulating layer comprises silicon oxide.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 23, 2022
From: LIM, WANGYU; KANG, HEESUNG; KO, JAEOK; AHN, JAEBIN; KIM, SUNJA; KIM, YOUNGJAE; KO, DONGHYUN
To: ASM IP HOLDING B.V.
Reel/Frame 059351/0218 →
Continuity (2)
Provisional Application 63166152 · Mar 25, 2021
Related Publication 20220310387A1 · Sep 29, 2022
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