IP Library Granted Patent US 12,406,907
Granted Patent B2
US 12,406,907 · App. 17/721,557 · Granted Sep 2, 2025

Semiconductor structure with conductive_structure

Inventors: Jia-Heng Wang (Kaohsiung, TW); Pang-Chi Wu (Hsinchu, TW); Chao-Hsun Wang (Taoyuan, TW); Fu-Kai Yang (Hsinchu, TW); Mei-Yun Wang (Hsin-Chu, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H01L23/4821H01L21/0259H10D30/031H10D30/6713H10D30/6729H10D30/6735H10D30/6757H10D62/118H10D64/017H10D64/018
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Quick Facts
Patent No.
US 12,406,907
App. No.
17/721,557
Granted
Sep 2, 2025
Kind
B2
Abstract

Semiconductor structures and methods for manufacturing the same are provided. The method includes a gate structure formed over a substrate, and a source/drain (S/D) structure formed adjacent to the gate structure. The semiconductor structure includes a dielectric layer formed over the S/D structure, and an S/D contact structure formed over the S/D structure. The S/D contact structure is through the dielectric layer. The semiconductor structure includes a gate contact structure formed through the dielectric layer and landing on the gate structure, and the gate contact structure is in direct contact with the gate structure. The semiconductor structure includes a bridging contact structure covering the gate contact structure and the S/D contact structure, and the bottommost surface of the bridging contact structure is in direct contact with the topmost surface of the S/D contact structure.

Claims (57)

1. A method for manufacturing a semiconductor structure, comprising:

forming a gate structure over a substrate;

forming a first dielectric layer over the gate structure;

forming a source/drain (S/D) structure adjacent to the gate structure;

forming an S/D contact structure over the S/D structure;

forming a second dielectric layer over the S/D contact structure;

forming a first trench through the first dielectric layer and the second dielectric layer over the gate structure to expose a top surface of the gate structure;

forming a gate contact structure in the first trench, wherein the gate contact structure is in direct contact with the gate structure;

removing a top portion of the gate contact structure; and

forming a bridging contact structure over the gate contact structure and the S/D contact structure, wherein the bridging contact structure is in direct contact with the gate contact structure and the S/D contact structure.

2. The method for manufacturing the semiconductor structure as claimed in claim 1 , wherein forming the gate contact structure in the first trench further comprises:

forming a barrier layer in the first trench; and

forming a conductive layer on the barrier layer, wherein the barrier layer is in direct contact with a gate electrode layer of the gate structure.

3. The method for manufacturing the semiconductor structure as claimed in claim 1 , wherein a portion of the gate contact structure is lower than a topmost surface of the gate structure.

4. The method for manufacturing the semiconductor structure as claimed in claim 1 , further comprising:

forming a mask layer over the gate structure, wherein the gate contact structure is through the mask layer.

5. The method for manufacturing the semiconductor structure as claimed in claim 1 , further comprising:

removing a top portion of the S/D contact structure, wherein the S/D contact structure has a recessed top surface, and the recessed top surface is lower than a top surface of the first dielectric layer.

6. The method for manufacturing the semiconductor structure as claimed in claim 1 , further comprising:

forming a second trench over the S/D contact structure, wherein the second trench is connected to the first trench, wherein a top surface of the S/D contact structure is exposed by the second trench.

7. The method for manufacturing the semiconductor structure as claimed in claim 6 , further comprising:

forming the bridging contact structure in the second trench using a deposition process, wherein the bridging contact structure has a curved top surface and no air gap is generated in the bridging contact structure; and

removing a portion of the bridging contact structure, so that the curved top surface becomes a substantially flat top surface.

8. The method for manufacturing the semiconductor structure as claimed in claim 1 , wherein a portion of the bridging contact structure is in direct contact with the first dielectric layer.

9. The method for manufacturing the semiconductor structure as claimed in claim 1 , wherein no liner layer is lining a sidewall the bridging contact structure.

10. A method for manufacturing a semiconductor structure, comprising:

forming nanostructures over a substrate;

forming a gate structure wrapped around the nanostructures;

forming a source/drain (S/D) structure attached to the nanostructures adjacent to the gate structure;

forming an S/D contact structure on the S/D structure;

forming a dielectric layer over the S/D contact structure and the gate structure;

forming a gate contact structure through the dielectric layer and covering the gate structure, wherein the gate contact structure comprises a barrier layer and a conductive layer over the barrier layer, and the barrier layer is in direct contact with the gate structure;

etching a top portion of the gate contact structure to form a shortened gate contact structure; and

forming a bridging contact structure on the shorted gate contact structure and the S/D contact structure, wherein the S/D contact structure is connected to the shorted gate contact structure by the bridging contact structure.

11. The method for manufacturing the semiconductor structure as claimed in claim 10 , further comprising:

forming an etch stop layer over the S/D contact structure, wherein the etch stop layer is between the S/D contact structure and the dielectric layer, and a bottom surface of the etch stop layer is lower than a top surface of the shorted gate contact structure.

12. The method for manufacturing the semiconductor structure as claimed in claim 10 , wherein a void is exposed after etching the top portion of the gate contact structure.

13. The method for manufacturing the semiconductor structure as claimed in claim 10 , further comprising:

removing a top portion of the S/D contact structure, wherein the S/D contact structure has a recessed top surface.

14. The method for manufacturing the semiconductor structure as claimed in claim 10 , further comprising:

forming the bridging contact structure using a deposition process, wherein the bridging contact structure has a curved top surface and no air gap is generated in the bridging contact structure; and

removing a portion of the bridging contact structure, so that the curved top surface becomes a substantially flat top surface.

15. A method for manufacturing a semiconductor structure, comprising:

forming nanostructures over a substrate;

forming a gate structure wrapped around the nanostructures;

forming a source/drain (S/D) structure attached to the nanostructures adjacent to the gate structure;

forming an S/D contact structure on the S/D structure;

forming a dielectric layer over the S/D contact structure and the gate structure;

forming a gate contact structure through the dielectric layer and covering the gate structure, wherein a void is in the gate contact structure;

removing a top portion of the gate contact structure to form a shortened gate contact structure to expose the void; and

forming a bridging contact structure on the shorted gate contact structure and the S/D contact structure.

16. The method for manufacturing the semiconductor structure as claimed in claim 15 , wherein a top surface of the shorted gate contact structure is higher than the top surface of the S/D contact structure.

17. The method for manufacturing the semiconductor structure as claimed in claim 15 , wherein the step of forming the bridging contact structure is formed by a bottom up deposition.

18. The method for manufacturing the semiconductor structure as claimed in claim 15 , further comprising:

removing a top portion of the S/D contact structure, wherein the S/D contact structure has a recessed top surface.

19. The method for manufacturing the semiconductor structure as claimed in claim 15 , wherein the bridging contact structure and the S/D contact structure are made of different materials.

20. The method for manufacturing the semiconductor structure as claimed in claim 15 , wherein no liner layer is lining a sidewall the bridging contact structure.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 18, 2022
From: WANG, JIA-HENG; WU, PANG-CHI; WANG, CHAO-HSUN; YANG, FU-KAI; WANG, MEI-YUN
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 059619/0425 →
Continuity (1)
Related Publication 20230335469A1 · Oct 19, 2023
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