IP Library Granted Patent US 11,849,081
Granted Patent B2
US 11,849,081 · App. 17/984,491 · Granted Dec 19, 2023

Solid state imaging device, method of manufacturing solid-state imaging device, and electronic apparatus

Inventor: Ryoji Suzuki (Kanagawa, JP)
Assignee: Sony Group Corporation
H04N25/62H01L27/1463H01L27/1464H01L27/14621H01L27/14625H01L27/14627H04N23/10
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,849,081
App. No.
17/984,491
Granted
Dec 19, 2023
Kind
B2
Abstract

The present technique aims to provide a solid-state imaging device that reduces shading and color mixing between pixels. The present invention also provides a method of manufacturing the solid-state imaging device. The present technique further relates to a solid-state imaging device that enables provision of an electronic apparatus that uses the solid-state imaging device, a method of manufacturing the solid-state imaging device, and an electronic apparatus. The solid-state imaging device includes a substrate, pixels each including a photoelectric conversion unit formed in the substrate, and a color filter layer formed on the light incidence surface side of the substrate. The solid-state imaging device also includes a device isolating portion that is formed to divide the color filter layer and the substrate for the respective pixels, and has a lower refractive index than the refractive indexes of the color filter layer and the substrate.

Claims (41)

1. An imaging device, comprising:

a semiconductor substrate;

a first photoelectric conversion region disposed in the semiconductor substrate;

a second photoelectric conversion region adjacent to the first photoelectric conversion region and disposed in the semiconductor substrate;

a first color filter disposed above the first photoelectric conversion region in a cross-sectional view;

a second color filter disposed above the second photoelectric conversion region in the cross-sectional view; and

an air gap, in the cross-sectional view, disposed between the first and second photoelectric conversion regions and disposed between the first and second color filters.

2. The imaging device of claim 1 , wherein the air gap is defined by a groove that extends into the semiconductor substrate.

3. The imaging device of claim 2 , further comprising:

a film disposed on inner wall surfaces of the groove.

4. The imaging device of claim 3 , wherein the film has a lower refractive index than the first color filter and the second color filter.

5. The imaging device of claim 3 , wherein the film is disposed on surfaces of the first color filter and surfaces of the second color filter.

6. The imaging device of claim 1 , further comprising:

an interconnect layer disposed on and electrically connected to the semiconductor substrate.

7. The imaging device of claim 6 , wherein the interconnect layer comprises a first transfer transistor to transfer charge collected by the first photoelectric conversion region, and a second transfer transistor to transfer charge collected by the second photoelectric conversion region.

8. The imaging device of claim 7 , wherein the interconnect layer further comprises a reset transistor, an amplification transistor, and a selection transistor.

9. The imaging device of claim 1 , further comprising:

a floating diffusion region disposed in the semiconductor substrate and that collects charge of the first photoelectric conversion region.

10. The imaging device of claim 9 , wherein, in the cross-sectional view, the floating diffusion region is below the air gap.

11. The imaging device of claim 10 , further comprising a first impurity region disposed in the semiconductor substrate and having a conductivity type opposite a conductivity type of the semiconductor substrate, wherein the floating diffusion region comprises the first impurity region.

12. The imaging device of claim 11 , further comprising:

a second impurity region disposed in the semiconductor substrate adjacent to the first impurity region and having a same conductivity type as the first impurity region with a higher concentration of impurities than the first impurity region.

13. The imaging device of claim 1 , further comprising:

an isolating portion disposed in the semiconductor substrate between the first photoelectric conversion region and the second photoelectric conversion region, wherein the isolating portion has a conductivity type opposite to a conductivity type of the semiconductor substrate.

14. An electronic apparatus, comprising:

a signal processing circuit; and

an imaging device, comprising:

a semiconductor substrate;

a first photoelectric conversion region disposed in the semiconductor substrate;

a second photoelectric conversion region adjacent to the first photoelectric conversion region and disposed in the semiconductor substrate;

a first color filter disposed above the first photoelectric conversion region in a cross-sectional view;

a second color filter disposed above the second photoelectric conversion region in the cross-sectional view; and

an air gap, in the cross-sectional view, disposed between the first and second photoelectric conversion regions and disposed between the first and second color filters.

15. The electronic apparatus of claim 14 , wherein the air gap is defined by a groove that extends into the semiconductor substrate.

16. The electronic apparatus of claim 15 , further comprising:

a film disposed on inner wall surfaces of the groove.

17. The electronic apparatus of claim 16 , wherein the film has a lower refractive index than the first color filter and the second color filter.

18. The electronic apparatus of claim 16 , wherein the film is disposed on surfaces of the first color filter and surfaces of the second color filter.

19. The electronic apparatus of claim 14 , further comprising:

an interconnect layer disposed on and electrically connected to the semiconductor substrate.

20. The electronic apparatus of claim 19 , wherein the interconnect layer comprises a first transfer transistor to transfer charge collected by the first photoelectric conversion region, and a second transfer transistor to transfer charge collected by the second photoelectric conversion region.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2022
From: SUZUKI, RYOJI
To: SONY CORPORATION
Reel/Frame 063087/0297 →
CHANGE OF NAME Recorded Nov 10, 2022
From: SONY CORPORATION
To: SONY GROUP CORPORATION
Reel/Frame 061916/0598 →
Priority Claims (1)
JP 2012-168365 · Jul 30, 2012 · national
Continuity (8)
Continuation 17337827 · Jun 3, 2021
Continuation 16864811 · May 1, 2020
Continuation 16415501 · May 17, 2019
Continuation 16218402 · Dec 12, 2018
Continuation 15720134 · Sep 29, 2017
Continuation 15261450 · Sep 9, 2016
Continuation 14417027
Related Publication 20230066988A1 · Mar 2, 2023