IP Library › Granted Patent US 12,660,381
Granted Patent B2
US 12,660,381 · App. 18/093,959 · Granted Jun 16, 2026

Light emitting element, method for fabricating the same and display device

Inventors: Mi Hyang Sheen (Yongin-si, KR); Yun Hyuk Ko (Yongin-si, KR); Dong Uk Kim (Yongin-si, KR); Na Ri Ahn (Yongin-si, KR); Chang Hee Lee (Yongin-si, KR); Do Hyung Kim (Yongin-si, KR); Ran Kim (Yongin-si, KR); In Pyo Kim (Yongin-si, KR); Ki Young Yeon (Yongin-si, KR); Je Won Yoo (Yongin-si, KR); Joo Hee Lee (Yongin-si, KR); Sang Ho Jeon (Yongin-si, KR); Jung Woon Jung (Yongin-si, KR); Chan Woo Joo (Yongin-si, KR); Jin Young Choi (Yongin-si, KR); Na Mi Hong (Yongin-si, KR); Jong Il Kim (Yongin-si, KR); Jin Ho Byun (Yongin-si, KR); Sang Ho Oh (Yongin-si, KR); Jae Kwang Lee (Yongin-si, KR); Yong Seok Choi (Yongin-si, KR); Jong Hoon Ha (Yongin-si, KR)
Assignee: Samsung Display Co., Ltd.
H10H20/8312H10H20/01H10H20/819H10H20/857H10W90/00H10H20/032
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,660,381
App. No.
18/093,959
Granted
Jun 16, 2026
Kind
B2
Abstract

A method for fabricating a light emitting element includes preparing a substrate, and forming a first semiconductor material layer, a light emitting material layer, a second semiconductor material layer and an electrode material layer on the substrate, forming semiconductor rods spaced apart from each other by etching the first semiconductor material layer, the light emitting material layer, the second semiconductor material layer and the electrode material layer in a direction perpendicular to an upper surface of the substrate, forming an insulating layer surrounding sides of the semiconductor rods through a sol-gel process by immersing the substrate, including the semiconductor rods, in a solution containing a precursor material, and forming light emitting elements by separating the semiconductor rods, including the insulating layer, from the substrate, and the light emitting elements have an external quantum efficiency of 20.2±0.6%.

Claims (62)

1 . A method for fabricating a light emitting element, the method comprising:

preparing a substrate, and forming a first semiconductor material layer, a light emitting material layer, a second semiconductor material layer and an electrode material layer on the substrate;

forming semiconductor rods spaced apart from each other by etching the first semiconductor material layer, the light emitting material layer, the second semiconductor material layer and the electrode material layer in a direction perpendicular to an upper surface of the substrate;

forming an insulating layer surrounding sides of the semiconductor rods through a sol-gel process by immersing the substrate, including the semiconductor rods, in a solution containing a precursor material; and

forming light emitting elements by separating the semiconductor rods, including the insulating layer, from the substrate,

wherein the light emitting elements have an external quantum efficiency of 20.2±0.6%.

2 . The method of claim 1 , wherein the sol-gel process is performed at a temperature of about 25° C. for about 15 minutes to about 60 minutes.

3 . The method of claim 2 , wherein the insulating layer has a thickness in a range of about 23 nm to about 80 nm.

4 . The method of claim 1 , wherein

the sol-gel process is performed one or more times, and

the insulating layer includes a first layer surrounding the semiconductor rods and a second layer surrounding the first layer of the insulating layer.

5 . The method of claim 4 , wherein

a process time of the sol-gel process of forming the first layer is substantially equal to a process time of the sol-gel process of forming the second layer, and

the first layer and the second layer have a same thickness.

6 . The method of claim 4 , wherein

a precursor material of the sol-gel process of forming the first layer is different from a precursor material of the sol-gel process of forming the second layer, and

the first layer and the second layer include different materials.

7 . The method of claim 6 , wherein

the first layer includes silicon oxide (SiO 2 ), and

the second layer includes aluminum oxide (Al 2 O 3 ).

8 . The method of claim 1 , further comprising:

heat-treating the semiconductor rods including the insulating layer before the separating of the semiconductor rods.

9 . The method of claim 8 , wherein the heat-treating of the semiconductor rods is performed at a temperature of about 250° C. for about 60 minutes.

10 . The method of claim 1 , wherein the forming of the semiconductor rods includes:

a first etching step of dry-etching the first semiconductor material layer, the light emitting material layer, the second semiconductor material layer and the electrode material layer; and

a second etching step of wet etching after the first etching step.

11 . A light emitting element comprising:

a first semiconductor layer doped with an n-type dopant;

a second semiconductor layer doped with a p-type dopant and disposed on the first semiconductor layer;

a light emitting layer disposed between the first semiconductor layer and the second semiconductor layer;

an electrode layer disposed on the second semiconductor layer; and

an insulating layer surrounding at least an outer surface of the light emitting layer,

wherein an external quantum efficiency is 20.2±0.6%.

12 . The light emitting element of claim 11 , wherein the insulating layer includes at least one of silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), aluminum nitride (AlN x ), aluminum oxide (AlO x ), zirconium oxide (ZrO x ), hafnium oxide (HfO x ), and titanium oxide (TiO x ).

13 . The light emitting element of claim 12 , wherein the insulating layer has a thickness in a range of about 23 nm to about 80 nm.

14 . The light emitting element of claim 11 , wherein

the insulating layer includes a first layer, and

a second layer surrounding the first layer.

15 . The light emitting element of claim 14 , wherein the first layer and the second layer include a same material, and have a substantially same thickness.

16 . The light emitting element of claim 14 , wherein

the first layer and the second layer include different materials, and

the first layer has a thickness greater than a thickness of the second layer.

17 . The light emitting element of claim 14 , wherein

the first layer includes silicon oxide (SiO 2 ), and

the second layer includes aluminum oxide (Al 2 O 3 ).

18 . A display device comprising:

first electrodes and second electrodes spaced apart from each other on a substrate;

a first insulating layer disposed on the first electrodes and the second electrodes;

a light emitting element disposed on the first insulating layer, having a first end disposed on the first electrodes and a second end disposed on the second electrodes;

a second insulating layer disposed on the light emitting element;

a first connection electrode disposed on the first electrodes on the second insulating layer and electrically contacting the first end of the light emitting element;

a second connection electrode disposed on the second electrodes on the second insulating layer and electrically contacting the second end of the light emitting element; and

a third insulating layer disposed on the second insulating layer and the second connection electrode and disposed below the first connection electrode, wherein

the light emitting element includes:

a first semiconductor layer doped with an n-type dopant;

a second semiconductor layer doped with a p-type dopant and disposed on the first semiconductor layer;

a light emitting layer disposed between the first semiconductor layer and the second semiconductor layer;

an electrode layer disposed on the second semiconductor layer; and

an insulating layer surrounding at least an outer surface of the light emitting layer, and

an external quantum efficiency is 20.2±0.6%.

19 . The display device of claim 18 , wherein the insulating layer includes at least one of silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), aluminum nitride (AlN x ), aluminum oxide (AlO x ), zirconium oxide (ZrO x ), hafnium oxide (HfO x ), and titanium oxide (TiO x ), and has a thickness in a range of about 23 nm to about 80 nm.

20 . The display device of claim 18 , wherein the insulating layer includes a first layer, and a second layer surrounding the first layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 16, 2023
From: SHEEN, MI HYANG; KO, YUN HYUK; KIM, DONG UK; AHN, NA RI; LEE, CHANG HEE; KIM, DO HYUNG; KIM, RAN; KIM, IN PYO; YEON, KI YOUNG; YOO, JE WON; LEE, JOO HEE; JEON, SANG HO; JUNG, JUNG WOON; JOO, CHAN WOO; CHOI, JIN YOUNG; HONG, NA MI; KIM, JONG IL; BYUN, JIN HO; OH, SANG HO; LEE, JAE KWANG; CHOI, YONG SEOK; HA, JONG HOON
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 062720/0844 →
Priority Claims (1)
KR 10-2022-0140050 · Oct 27, 2022 · national
Continuity (2)
Provisional Application 63296996 · Jan 6, 2022
Related Publication 20230215983A1 · Jul 6, 2023
References Cited (35)
US 20090146142A1 · Kim et al. · 2009 [cited by applicant]
US 20110068359A1 · Yahata · 2011 [cited by examiner]
US 20120132888A1 · Kwak · 2012 [cited by examiner]
US 20130221385A1 · Shibata · 2013 [cited by examiner]
US 20140145237A1 · Do · 2014 [cited by examiner]
US 20150380461A1 · Robin · 2015 [cited by examiner]
US 20180226461A1 · Adachi · 2018 [cited by examiner]
US 20190131557A1 · Lee · 2019 [cited by examiner]
US 20190172819A1 · Bae · 2019 [cited by examiner]
US 20190378953A1 · Min · 2019 [cited by examiner]
US 20200403119A1 · Sakong · 2020 [cited by examiner]
US 20210167050A1 · Cho · 2021 [cited by examiner]
US 20210202450A1 · Min · 2021 [cited by examiner]
US 20210202803A1 · Park · 2021 [cited by examiner]
US 20210242369A1 · Choi · 2021 [cited by examiner]
US 20210242380A1 · Kim · 2021 [cited by examiner]
US 20210317365A1 · Yang · 2021 [cited by examiner]
US 20210376193A1 · Ko et al. · 2021 [cited by applicant]
US 20220013693A1 · Cho · 2022 [cited by examiner]
US 20220068892A1 · Cha · 2022 [cited by examiner]
US 20220069005A1 · Do · 2022 [cited by examiner]
US 20220140186A1 · Min · 2022 [cited by examiner]
US 20220140191A1 · Sim · 2022 [cited by examiner]
US 20220173276A1 · Teo · 2022 [cited by examiner]
US 20220310884A1 · Do · 2022 [cited by examiner]
US 20220384395A1 · Tan · 2022 [cited by examiner]
JP 2019212875 · 2019 [cited by applicant]
KR 1020090058952 · 2009 [cited by applicant]
KR 1020090066936 · 2009 [cited by applicant]
KR 100904588 · 2009 [cited by applicant]
KR 1020200021014 · 2020 [cited by applicant]
KR 102311519 · 2021 [cited by applicant]
KR 1020210147158 · 2021 [cited by applicant]
Lee et al., “Highly efficient top-down processed blue InGaN nanoscale light-emitting diodes”, Research Square, Oct. 28, 2021, pp. 1-18. [cited by applicant]
Sheen et al., “Highly efficient blue InGaN nanoscale light-emitting diodes”, Nature, Aug. 3, 2022, pp. 1-20. [cited by applicant]