Switching circuit
In one embodiment, an impedance matching network includes a variable reactance circuit having fixed reactance components and corresponding switching circuits. Each switching circuit includes a diode and a driver circuit. The driver circuit includes, coupled in series, a biasing current source positioned to provide a bias current to bias the diode, a first switch, a second switch, and a resistor. For each diode of each switching circuit, the control circuit is configured to receive a value related to a voltage drop on the resistor and, based on the value related to the voltage drop, adjust the bias current being provided by the biasing current source.
1. An impedance matching circuit comprising:
a radio frequency (RF) input configured to couple to an RF source;
an RF output configured to couple to a plasma chamber; and
a control circuit; and
a variable reactance circuit operably coupled to the control circuit and configured to provide a variable reactance, the variable reactance circuit comprising fixed reactance components and corresponding switching circuits, wherein each of the switching circuits comprises:
a diode; and
a driver circuit operably coupled to the diode and configured to switch the diode, the driver circuit comprising:
a biasing current source positioned to provide a bias current to bias the diode;
a first switch operably coupled to the diode and the biasing current source;
a second switch operably coupled to the diode; and
a resistor coupled to the biasing current source;
wherein, for each diode of each switching circuit, the control circuit is configured to (a) receive a value related to a voltage drop on the resistor, and (b) based on the value related to the voltage drop, adjust the bias current being provided by the biasing current source.
2. The impedance matching circuit of claim 1 ,
wherein the control circuit is further configured to, based on the value related to the voltage drop on the resistor, determine a current in each diode; and
wherein the adjustment of the bias current is based on the current in the diode.
3. The impedance matching circuit of claim 1 , wherein the adjustment of the bias current is configured to ensure that the diode for each switching circuit has sufficient bias current for processing RF current when the diode is ON.
4. The impedance matching circuit of claim 1 , wherein the bias current is a forward-biasing DC current sufficient to turn ON the diode.
5. The impedance matching circuit of claim 1 , wherein the value related to a voltage drop is the voltage drop.
6. The impedance matching circuit of claim 1 , wherein each driver circuit of each switching circuit further comprises an amplifier comprising (a) input terminals coupled across the resistor, and (b) an output, wherein the control circuit receives the value related to the voltage drop via the output of the amplifier.
7. The impedance matching circuit of claim 6 , wherein each driver circuit of each switching circuit further comprises a linear opto-coupler coupled to the output of the amplifier, wherein the control circuit receives the value related to the voltage drop from the linear opto-coupler.
8. The impedance matching circuit of claim 1 , wherein the variable reactance circuit is an electronically variable capacitor, and the fixed reactance components are fixed capacitors.
9. The impedance matching circuit of claim 1 , wherein, for each switching circuit, the diode is a PIN or NIP diode.
10. The impedance matching circuit of claim 1 , wherein, for each switching circuit, the first and second switches are metal-oxide semiconductor field-effect transistors (MOSFETs).
11. The impedance matching circuit of claim 1 , wherein, for each switching circuit, a first node between the first switch and the second switch is coupled to a second node between the reactance component and its corresponding diode.
12. The impedance matching circuit of claim 1 , wherein a drain of the first switch is coupled to a source of the second switch.
13. A semiconductor processing tool comprising:
a plasma chamber configured to deposit a material onto a substrate or etch a material from the substrate; and
an impedance matching circuit operably coupled to the plasma chamber, the matching circuit comprising:
an RF input configured to couple to an RF source;
an RF output configured to couple to the plasma chamber; and
a control circuit; and
a variable reactance circuit operably coupled to the control circuit and configured to provide a variable reactance, the variable reactance circuit comprising fixed reactance components and corresponding switching circuits, wherein each of the switching circuits comprises:
a diode; and
a driver circuit operably coupled to the diode and configured to switch the diode, the driver circuit comprising:
a biasing current source positioned to provide a bias current to bias the diode;
a first switch operably coupled to the diode and the biasing current source;
a second switch operably coupled to the diode; and
a resistor coupled to the biasing current source;
wherein, for each diode of each switching circuit, the control circuit is configured to (a) receive a value related to a voltage drop on the resistor, and (b) based on the value related to the voltage drop, adjust the bias current being provided by the biasing current source.
14. The semiconductor processing tool of claim 13 ,
wherein the control circuit is further configured to, based on the value related to the voltage drop on the resistor, determine a current in each diode; and
wherein the adjustment of the bias current is based on the current in the diode.
15. The semiconductor processing tool of claim 13 , wherein the adjustment of the bias current is configured to ensure that the diode for each switching circuit has sufficient bias current for processing RF current when the diode is ON.
16. The semiconductor processing tool of claim 13 , wherein the bias current is a forward-biasing DC current sufficient to turn ON the diode.
17. The semiconductor processing tool of claim 13 , wherein the value related to a voltage drop is the voltage drop.
18. The semiconductor processing tool of claim 13 , wherein each driver circuit of each switching circuit further comprises an amplifier comprising (a) input terminals coupled across the resistor, and (b) an output, wherein the control circuit receives the value related to the voltage drop via the output of the amplifier.
19. The semiconductor processing tool of claim 18 , wherein each driver circuit of each switching circuit further comprises a linear opto-coupler coupled to the output of the amplifier, wherein the control circuit receives the value related to the voltage drop from the linear opto-coupler.
20. A method of impedance matching comprising:
operably coupling a matching network between an RF source and a plasma chamber, the matching network comprising:
a control circuit; and
a variable reactance circuit operably coupled to the control circuit, the variable reactance circuit comprising fixed reactance components and corresponding switching circuits, wherein each of the switching circuits comprises:
a diode; and
a driver circuit operably coupled to the diode and configured to switch the diode, the driver circuit comprising:
a biasing current source positioned to provide a bias current to bias the diode;
a first switch operably coupled to the diode and the biasing current source;
a second switch operably coupled to the diode; and
a resistor coupled to biasing current source;
altering a reactance of the variable reactance circuit by altering a state of at least one of the switching circuits;
for each diode of each switching circuit:
receiving a value related to a voltage drop on the resistor;
based on the value related to the voltage drop, adjusting the bias current being provided by the biasing current source.