Semiconductor structure and manufacturing method thereof
The present disclosure provides a semiconductor structure and a manufacturing method thereof, and relates to the technical field of semiconductors. The semiconductor structure includes a base, first contact structures, second contact structure, and third contact structures. The base includes an active region, and a source region, a gate region, and a drain region that are sequentially adjacent to each other are formed in the active region; the first contact structures are provided on the source region and the drain region; the second contact structure is provided on the gate region; the third contact structures are provided on first contact structures and the second contact structure, an area of a top surface of the first contact structure and an area of a top surface of the second contact structure are both larger than an area of a bottom surface of the third contact structure.
1. A method of manufacturing a semiconductor structure, comprising:
providing a base, wherein an active region is formed on the base, and the active region comprises a source region, a gate region, and a drain region that are sequentially adjacent to each other;
forming a first contact structure on each of the source region and the drain region, and forming a second contact structure on the gate region; and
forming a third contact structure on each of the first contact structures and the second contact structure, wherein an area of a bottom surface of the first contact structure and an area of a bottom surface of the second contact structure are both larger than an area of a top surface of the third contact structure,
further comprising:
forming a contact layer on the active region, wherein the contact layer covers the source region and the drain region;
wherein the forming a contact layer on the active region comprises:
forming an initial contact layer on the active region, wherein the initial contact layer covers the source region, the gate region, and the drain region; and
removing a part of the initial contact layer on a top surface and a side wall of the gate region, wherein a remaining part of the initial contact layer forms the contact layer.
2. The method of manufacturing a semiconductor structure according to claim 1 , wherein the forming an initial contact layer on the active region comprises:
forming a cobalt layer on the active region; and
performing a thermal process on the cobalt layer at a processing temperature of 650° C. to 800° C., wherein the cobalt layer reacts with silicon on a surface layer of the active region to form a cobalt silicide layer, and the cobalt silicide layer forms the initial contact layer.
3. The method of manufacturing a semiconductor structure according to claim 1 , wherein forming the first contact structures and the second contact structure comprises:
forming a dielectric layer and a first hard mask layer that are laminated on a contact layer;
forming a first photoresist layer having a first patterned shape on the first hard mask layer;
removing a part of the first hard mask layer and a part of the dielectric layer by using the first photoresist layer as a mask to form a plurality of first contact holes and a second contact hole;
forming an adhesive layer in the first contact holes; and
forming a conductive layer on the adhesive layer and in the second contact hole, wherein a top surface of the conductive layer is flush with a top surface of the first hard mask layer, a part of the adhesive layer and a part of the conductive layer in the first contact hole form the first contact structure, and a part of the conductive layer in the second contact hole forms the second contact structure.
4. The method of manufacturing a semiconductor structure according to claim 3 , wherein the removing a part of the first hard mask layer and a part of the dielectric layer by using the first photoresist layer as a mask to form a plurality of first contact holes and a second contact hole comprises:
etching an exposed part of the first hard mask layer through a first etching gas by using the first photoresist layer as the mask, to expose the dielectric layer, wherein an etching time for the first hard mask layer ranges from 60 s to 80 s, and an etching temperature for the first hard mask layer ranges from 12 degrees Celsius to 18 degrees Celsius;
etching an exposed part of the dielectric layer through a second etching gas, wherein an etching time for the dielectric layer ranges from 80 s to 100 s, and an etching temperature for the dielectric layer ranges from 12 degrees Celsius to 18 degrees Celsius; and
removing the first photoresist layer.
5. The method of manufacturing a semiconductor structure according to claim 3 , wherein the forming a third contact structure on each of the first contact structures and the second contact structure comprises:
forming a second hard mask layer on the first hard mask layer;
forming a second photoresist layer having a second patterned shape on the second hard mask layer;
removing a part of the second hard mask layer by using the second photoresist layer as a mask, to form third contact holes on the second hard mask layer, wherein the third contact holes expose top surfaces of the first contact structures and a top surface of the second contact structure, and along a second direction, a width of the third contact hole is smaller than a width of the first contact hole;
forming the third contact structure in the third contact hole; and
removing the second photoresist layer.
6. The method of manufacturing a semiconductor structure according to claim 5 , further comprising:
removing a remaining part of the second hard mask layer, a remaining part of the first hard mask layer, and a remaining part of the dielectric layer.
7. A method of manufacturing a semiconductor structure, comprising:
providing a base, wherein an active region is formed on the base, and the active region comprises a source region, a gate region, and a drain region that are sequentially adjacent to each other;
forming a first contact structure on each of the source region and the drain region, and forming a second contact structure on the gate region; and
forming a third contact structure on each of the first contact structures and the second contact structure, wherein an area of a bottom surface of the first contact structure and an area of a bottom surface of the second contact structure are both larger than an area of a top surface of the third contact structure;
wherein forming the first contact structures and the second contact structure comprises:
forming a dielectric layer and a first hard mask layer that are laminated on a contact layer;
forming a first photoresist layer having a first patterned shape on the first hard mask layer;
removing a part of the first hard mask layer and a part of the dielectric layer by using the first photoresist layer as a mask to form a plurality of first contact holes and a second contact hole;
forming an adhesive layer in the first contact holes; and
forming a conductive layer on the adhesive layer and in the second contact hole, wherein a top surface of the conductive layer is flush with a top surface of the first hard mask layer, a part of the adhesive layer and a part of the conductive layer in the first contact hole form the first contact structure, and a part of the conductive layer in the second contact hole forms the second contact structure.
8. The method of manufacturing a semiconductor structure according to claim 7 , wherein the removing a part of the first hard mask layer and a part of the dielectric layer by using the first photoresist layer as a mask to form a plurality of first contact holes and a second contact hole comprises:
etching an exposed part of the first hard mask layer through a first etching gas by using the first photoresist layer as the mask, to expose the dielectric layer, wherein an etching time for the first hard mask layer ranges from 60 s to 80 s, and an etching temperature for the first hard mask layer ranges from 12 degrees Celsius to 18 degrees Celsius;
etching an exposed part of the dielectric layer through a second etching gas, wherein an etching time for the dielectric layer ranges from 80 s to 100 s, and an etching temperature for the dielectric layer ranges from 12 degrees Celsius to 18 degrees Celsius; and
removing the first photoresist layer.
9. The method of manufacturing a semiconductor structure according to claim 7 , wherein the forming a third contact structure on each of the first contact structures and the second contact structure comprises:
forming a second hard mask layer on the first hard mask layer;
forming a second photoresist layer having a second patterned shape on the second hard mask layer;
removing a part of the second hard mask layer by using the second photoresist layer as a mask, to form third contact holes on the second hard mask layer, wherein the third contact holes expose top surfaces of the first contact structures and a top surface of the second contact structure, and along a second direction, a width of the third contact hole is smaller than a width of the first contact hole;
forming the third contact structure in the third contact hole; and
removing the second photoresist layer.
10. The method of manufacturing a semiconductor structure according to claim 9 , further comprising:
removing a remaining part of the second hard mask layer, a remaining part of the first hard mask layer, and a remaining part of the dielectric layer.