Semiconductor device including backside isolation structure and placeholder isolation structure
Provided is a semiconductor device including: a 1 st source/drain region and a 1 st backside contact structure, vertically below the 1 st source/drain region, connected to the 1 st source/drain region; a 2 nd source/drain region and a 1 st placeholder isolation structure vertically below the 2 nd source/drain region; and a backside isolation structure, on a back side of the semiconductor device, surrounding the 1st backside contact structure and the 1st placeholder isolation structure.
1 . A semiconductor device comprising:
a 1 st source/drain region and a 1 st backside contact structure, vertically below the 1 st source/drain region, connected to the 1 st source/drain region;
a 2 nd source/drain region and a 1 st placeholder isolation structure vertically below the 2 nd source/drain region;
a backside isolation structure, on a back side of the semiconductor device, surrounding the 1 st backside contact structure and the 1 st placeholder isolation structure; and
a 3 rd source/drain region and a 2 nd placeholder isolation structure vertically below the 3 rd source/drain region,
wherein the 2 nd source/drain region is between the 1 st source/drain region and the 3 rd source/drain region, and
wherein a horizontal distance between the 1 st backside contact structure and the 1 st placeholder isolation structure is equal to a horizontal distance between the 1 st placeholder isolation structure and the 2 nd placeholder isolation structure.
2 . The semiconductor device of claim 1 , wherein the 1 st placeholder isolation structure and the backside isolation structure have different material compositions.
3 . The semiconductor device of claim 2 , wherein the 1 st placeholder isolation structure comprises silicon nitride, and the backside isolation structure comprises silicon oxide.
4 . The semiconductor device of claim 1 , wherein an interface is formed between the backside isolation structure and the 1 st placeholder isolation structure.
5 . The semiconductor device of claim 4 , wherein the backside isolation structure and the 1 st placeholder isolation structure comprise the same material composition.
6 . The semiconductor device of claim 1 , wherein the 1 st placeholder isolation structure comprises a different material from the backside isolation structure, and
wherein the 2 nd placeholder isolation structure comprises a different material from the backside isolation structure.
7 . The semiconductor device of claim 6 , wherein each of the 1 st and 2 nd placeholder isolation structures comprises silicon nitride, and the backside isolation structure comprises silicon oxide, and
wherein a width of an uppermost portion of the 1 st placeholder isolation structure is less than or equal to a width of a lowermost portion of the 2 nd source/drain region.
8 . The semiconductor device of claim 1 , wherein at least one of the 1 st and 2 nd source/drain regions is a lower source/drain region of a stacked field-effect transistor comprising the lower source/drain region and an upper source/drain region stacked above the lower source/drain region.
9 . The semiconductor device of claim 8 , wherein the lower source/drain region and the upper source/drain region form different field-effect transistors.
10 . A semiconductor device comprising:
a 1 st device comprising at least one 1 st transistor forming a logic device or a memory device;
a 2 nd device comprising at least one 2 nd transistor forming another logic device or another memory device; and
a backside isolation structure at a back side of each of the 1 st and 2 nd devices,
wherein the 1 st device is adjacent to the 2 nd device in a 1 st horizontal direction,
wherein no shallow trench isolation (STI) structure is formed in the backside isolation structure adjacent the 1 st device in the 1 st horizontal direction, and
wherein no STI structure is formed in the backside isolation structure adjacent the 1 st device in a 2 nd horizontal direction perpendicular to the 1 st horizontal direction.
11 . The semiconductor device of claim 10 , wherein the 1 st transistor comprises a 1 st pair of source/drain regions that are electrically connected via a 1 st channel structure,
wherein the 2 nd transistor comprises a 2 nd pair of source/drain regions that are electrically connected via a 2 nd channel structure and are spaced apart from the 1 st pair of source/drain regions in the 1 st horizontal direction, and
wherein a placeholder isolation structure is formed vertically below at least one of the 1 st pair of source/drain regions in the backside isolation structure.
12 . The semiconductor device of claim 11 , wherein the placeholder isolation structure and the backside isolation structure comprise different materials.
13 . The semiconductor device of claim 12 , wherein the placeholder isolation structure comprises silicon nitride, and the backside isolation structure comprises silicon oxide.
14 . A semiconductor device comprising:
a 1 st device comprising at least one transistor;
a 2 nd device comprising at least one passive device;
a backside isolation structure at a back side of the 1 st and 2 nd devices; and
a backside contact structure extending in the backside isolation structure and electrically connected to a source/drain region of the transistor,
wherein the 1 st device is horizontally adjacent to the 2 nd device,
wherein no shallow trench isolation (STI) structure is formed between the backside contact structure and the 2 nd device in the backside isolation structure, and
wherein no STI structure is formed in contact with the backside contact structure in the backside isolation structure.
15 . The semiconductor device of claim 14 , wherein the source/drain region is a 1 st source/drain region of the transistor,
wherein the semiconductor device further comprises a placeholder isolation structure vertically below a 2 nd source/drain region of the transistor in the backside isolation structure, and
wherein no STI structure is formed in contact with the placeholder isolation structure in the backside isolation structure.
16 . The semiconductor device of claim 15 , wherein the placeholder isolation structure and the backside isolation structure comprise different materials.
17 . The semiconductor device of claim 16 , wherein the placeholder isolation structure comprises silicon nitride, and the backside isolation structure comprises silicon oxide.
18 . The semiconductor device of claim 1 , wherein the 1 st placeholder isolation structure and the 2 nd placeholder isolation structure are horizontally spaced apart, with the backside isolation structure therebetween and without any shallow trench isolation (STI) structure therebetween.
19 . The semiconductor device of claim 10 , wherein the 1 st device comprises a 1 st CMOS device, and
wherein the 2 nd device comprises a 2 nd CMOS device different from the 1 st CMOS device.
20 . The semiconductor device of claim 14 , wherein the passive device comprises a 1 st region and a 2 nd region that are in the backside isolation structure,
wherein the 1 st region has a first conductivity type, and the 2 nd region has a second conductivity type opposite the first conductivity type, and
wherein no STI structure is formed between the backside contact structure and the 1 st and 2 nd regions in the backside isolation structure.