Semiconductor device
A semiconductor device includes an interlayer insulating film including a first surface and a second surface opposite to the first surface in a first direction; a source/drain pattern provided in the interlayer insulating film; a channel pattern adjacent to the source/drain pattern in a second direction and contacting the source/drain pattern; a front wiring provided on the first surface of the interlayer insulating film; a back wiring provided on the second surface of the interlayer insulating film; and a first connecting via contact and a second connecting via contact which are provided between the source/drain pattern and the back wiring and connected to the source/drain pattern.
1 . A semiconductor device comprising:
an interlayer insulating film comprising a first surface and a second surface opposite to the first surface in a first direction;
a source/drain pattern provided in the interlayer insulating film, the source/drain pattern being undivided;
a channel pattern adjacent to the source/drain pattern in a second direction and contacting the source/drain pattern;
a front wiring provided on the first surface of the interlayer insulating film;
a back wiring provided on the second surface of the interlayer insulating film; and
a first connecting via contact and a second connecting via contact which are provided between the source/drain pattern and the back wiring and are connected to the source/drain pattern.
2 . The semiconductor device of claim 1 , wherein the first connecting via contact comprises a first surface and a second surface opposite to the first surface in the first direction,
wherein the first surface of the first connecting via contact faces the source/drain pattern, and
wherein a width of the first surface of the first connecting via contact in a third direction is greater than a width of the second surface of the first connecting via contact in the third direction.
3 . The semiconductor device of claim 1 , wherein the first connecting via contact comprises a first surface and a second surface opposite to the first surface in the first direction,
wherein the first surface of the first connecting via contact faces the source/drain pattern, and
wherein a width of the first surface of the first connecting via contact in a third direction is the same as a width of the second surface of the first connecting via contact in the third direction.
4 . The semiconductor device of claim 1 , wherein the back wiring comprises a first surface and a second surface opposite to each other in the first direction,
wherein the first surface of the back wiring faces the source/drain pattern, and
wherein a width of the first surface of the back wiring in a third direction is smaller than a width of the second surface of the back wiring in the third direction.
5 . The semiconductor device of claim 1 , wherein the first connecting via contact is spaced apart from the second connecting via contact in a third direction.
6 . The semiconductor device of claim 1 , wherein the back wiring and the first connecting via contact each include an upper surface facing the source/drain pattern, and
wherein the second surface of the interlayer insulating film is lower than the upper surface of the first connecting via contact relative to the upper surface of the back wiring.
7 . The semiconductor device of claim 1 , further comprising:
a source/drain etching stop film extending along side walls and an upper surface of the source/drain pattern,
wherein the first connecting via contact and the second connecting via contact do not overlap with the source/drain etching stop film in a third direction.
8 . The semiconductor device of claim 1 , further comprising:
a contact insulating liner which extends along side walls of the first connecting via contact and side walls of the second connecting via contact.
9 . The semiconductor device of claim 8 , wherein the contact insulating liner extends along the second surface of the interlayer insulating film.
10 . The semiconductor device of claim 1 , further comprising:
a contact silicide film which is provided between the first connecting via contact and the source/drain pattern, and between the second connecting via contact and the source/drain pattern.
11 . The semiconductor device of claim 10 , wherein the contact silicide film between the first connecting via contact and the source/drain pattern is separated from the contact silicide film between the second connecting via contact and the source/drain pattern.
12 . The semiconductor device of claim 1 , wherein the channel pattern comprises a plurality of sheet patterns spaced apart in the first direction.
13 . A semiconductor device comprising:
an upper interlayer insulating film comprising a first surface and a second surface opposite to the first surface in a first direction;
a source/drain pattern provided in the upper interlayer insulating film, the source/drain pattern being undivided;
a gate electrode provided in the upper interlayer insulating film, adjacent to the source/drain pattern in a second direction, and which extends in a third direction;
a front wiring provided on the first surface of the upper interlayer insulating film;
a first lower interlayer insulating film provided on the second surface of the upper interlayer insulating film;
a back wiring provided in the first lower interlayer insulating film;
a second lower interlayer insulating film provided below the first lower interlayer insulating film and the upper interlayer insulating film; and
a plurality of connecting via contacts provided in the second lower interlayer insulating film, the plurality of connecting via contacts connecting the source/drain pattern and the back wiring, and being spaced apart in the third direction,
wherein a width of each connecting via contact of the plurality of connecting via contacts in the third direction decreases, as the connecting via contact extends away from the source/drain pattern.
14 . The semiconductor device of claim 13 , wherein a width of the back wiring in the third direction increases, as the back wiring extends away from the source/drain pattern.
15 . The semiconductor device of claim 13 , further comprising:
a contact insulating liner extending along side walls of each of the plurality of connecting via contacts.
16 . The semiconductor device of claim 15 , wherein the contact insulating liner extends along the second surface of the upper interlayer insulating film.
17 . The semiconductor device of claim 13 , further comprising:
a gate passivation film provided between the second lower interlayer insulating film and the upper interlayer insulating film, and extends in the third direction,
wherein the gate passivation film overlaps with the gate electrode in the first direction.
18 . A semiconductor device comprising:
an upper interlayer insulating film which comprises a first surface and a second surface opposite to the first surface in a first direction;
a source/drain pattern provided in the upper interlayer insulating film, the source/drain pattern being undivided;
a gate electrode provided in the upper interlayer insulating film, adjacent to the source/drain pattern in a second direction, and extending in a third direction;
a channel pattern contacting the source/drain pattern;
a front wiring provided on the first surface of the upper interlayer insulating film;
a first lower interlayer insulating film provided on the second surface of the upper interlayer insulating film;
a back wiring provided in the first lower interlayer insulating film;
a second lower interlayer insulating film provided below the first lower interlayer insulating film and the upper interlayer insulating film; and
a plurality of connecting via contacts provided in the second lower interlayer insulating film, and connecting the source/drain pattern and the back wiring,
wherein each of the plurality of connecting via contacts comprises a first surface facing the source/drain pattern, and a second surface opposite to the first surface of the respective one of the plurality of connecting via contacts in the first direction,
wherein the back wiring comprises a first surface facing the plurality of connecting via contacts, and a second surface opposite to the first surface of the back wiring in the first direction,
wherein a width of the first surface of each of the connecting via contacts in the third direction is greater than a width of the second surface of each of the connecting via contacts in the third direction, and
wherein a width of the first surface of the back wiring in the third direction is smaller than a width of the second surface of the back wiring in the third direction.
19 . The semiconductor device of claim 18 , wherein the plurality of connecting via contacts comprises a first sub-connecting via contact and a second sub-connecting via contact spaced apart from the first sub-connecting via contact in the third direction, and
wherein a width of the first sub-connecting via contact in the third direction and a width of the second sub-connecting via contact in the third direction decrease, as the first sub-connecting via contact and the second sub-connecting via contact extend away from the source/drain pattern.
20 . The semiconductor device of claim 18 , further comprising:
a contact insulating liner provided between the second lower interlayer insulating film and each of the connecting via contacts, and extending along side walls of each of the connecting via contacts.